Advanced plasma processing combined with trench isolation technology for fabrication and fast prototyping of high aspect ratio MEMS in standard silicon wafers

Abstract

A bulk micromachining technology for fabrication of micro electro mechanical systems (MEMS) in a standard silicon wafer is presented. A fabrication process, suitable for full integration with on-chip electronics, employs advanced plasma processing to etch, passivate and release micromechanical structures in a single plasma system, and vertical trench isolation to obtain electrical isolation between the released components. Distinct electrical domains can be defined even on movable parts. The sophisticated electrical isolation between high-aspect-ratio single-crystal silicon (SCS) components allows simplification of the fabrication and improvement of the performance of existing devices and design of entirely new MEMS. The presented technology is an attractive platform for both fabrication and rapid prototyping of MEMS. This is due to a short processing time, a large freedom of design, high process flexibility and low-cost of the starting SCS substrate relative to SOI substrates. Several example microstructures demonstrating the capabilities of this technology have been successfully fabricated.

Design and Fabrication of a Planar Three-DOFs MEMS-Based Manipulator

“…The planar manipulator is fabricated with a simple twomask process that enables high-aspect-ratio structures made in highly doped SCS combined with electrical insulation [26]. With the help of trenches refilled with a dielectric material, the process allows structures in conventional 100 wafers to be mechanically connected, while being electrically insulated from each other.…”

Novel Trench Isolation Technology for Suspended MEMS Structures

“…Several approaches have been used for structure release and electrical isolation, including single-crystal reactive etching and metallization (SCREAM) [2], the black silicon method (BSM) [3], the silicon-on-insulator (SOI) process [4], surface/bulk micromachining (SBM) [5], the dissolved wafer process (DWP) [6], the boron etch-stop assisted lateral silicon etching (BELST) process [7], the aluminum interconnect process for air-gap-insulated microstructures (AIM) [8], the polymer sidewall protection process for trench isolation technology [9], and the polymer sidewall protection process [[10]]. SOI and BSM processes involve the use of the buried oxide layer as the sacrificial layer for wet release.…”

“…The parylene beams provide electrical isolation between the suspended structure and substrate, and prevent anchor movement during actuation and wire-bonding. The proposed PBTI process enhances the polymer sidewall protection for trench isolation technology [9] because the trench isolation material from LPCVD low-stress silicon nitride is changed to parylene (polypara-xylylene). By changing the isolation trench material from silicon nitride to parylene, a change from a high-temperature (approximately 800 °C) LPCVD process to roomtemperature (approximately 20 °C) parylene deposition can be achieved.…”

“…After the parylene-based electrical isolation beams are created, the modified Bosch process [9], [10] is applied to fabricate the suspended MEMS structure through an inductively coupled plasma-reactive ion etching (ICP-RIE) process. The trench etching, sidewall protection, floor polymer removal, structure release, and polymer stripping steps can be completed by modifying the etching or passivation steps of the Bosch process.…”

Lateral nano-Newton force-sensing piezoresistive cantilever for microparticle handling

“…The capacitive structures, however, need to be completely isolated between two electrodes; so normally silicon-on-insulator (SOI) wafers are employed. Instead of SOI, trench isolation can be used [2]. However, it is difficult to control the etching area to obtain a completely isolated structure.…”