Advanced Readout System IC Current Mode Semi-Gaussian Shapers Using CCIIs and OTAs

Abstract

Novel CMOS current mode shapers for front-end electronics are proposed. In particular, six semi-Gaussian shaper implementations based on second generation current conveyors and operational transconductance amplifiers are designed using advanced filter design techniques. Although all shaper architectures are fully integrated, they satisfy a relatively large peaking time. The topologies are analytically compared in terms of noise performance, power consumption, total harmonic distortion (THD), and dynamic range (DR) in order to examine which is the most preferable in readout applications. Design technique selection criteria are proposed in relation to the shaper structures performance. Analysis is supported by simulations results using SPICE in a 0.6 μm process by Austria Mikro Systeme (AMS).

Analog Electronics for HVCMOS Sensors

“…[21,28,29] where k 1 , k 2 , k 3, and k 4 are the following constants [21,28,29]: Considering a Dirac pulse δ(t) as an input signal, by taking the inverse Laplace transform of the product, the output signal in the time domain is given by Refs.…”

“…[28,29]. The proposed topology, in controversy to the typical shaping structures, is not based on op amps, which generally demand large-area input transistors and high-bias currents, but rather on operational transconductance amplifiers (OTAs).…”

“…Using the analysis and methodology presented in Sections 1.2.1 and 1.2.2 on the CSP and shaper design, respectively, an advanced, fully integrated radiation-detection analog processing channel was designed and fabricated [29]. The preamplifier-shaper readout front-end system was designed, simulated, and fabricated in a 0.35-μm CMOS process (3M/2P 3.3/5 V) by Austria Mikro Systeme for a specific low-energy x-ray silicon strip detector.…”

“…The preamplifier transistor's length and width area are provided in Table 1.3. The level-shifting bias voltage is equal to −1.18 V [29]. The level-shifting stage was added as the DC bias level of the signal that is provided to the shaper to be controlled and the general dynamic range and 1-dB compression point of the filter that is to be optimized.…”

Integrated Filter Design for Analog Field Mill Sensor Interface

“…In ASICs, bulky passive components are challenging to integrate; thus, several design techniques are adopted to circumvent this issue. Passive element replacement by OTA-based or CCII-based simulator structures is a preferred method in filter integration [ 12 , 13 ], due to its non-complex design logic and its adaptability to a variety of application specifications. Filter integration is also beneficial in that it allows design optimization in terms of noise, power consumption, and area.…”