Advancements In Low-Power Technologies: Clock-Gated Circuits and Beyond

Abstract

With the continuous advancement of the integrated circuit industry, there has been a steady rise in the level of integration and circuit scale. This inevitably leads to an escalation in power consumption by electronic devices, underscoring the growing significance of low-power technology. This comprehensive review initiates by elucidating the fundamental concept of low power, followed by an exploration of optimization measures utilizing clock-gated circuits as a prime example. Subsequently, it outlines the current challenges and prospects associated with low-power technologies. The core focus of this review revolves around the utilization of clock tree structures and triggers, which constitute the primary contributors to dynamic power consumption. These methodologies are presently the most prevalent and efficacious means to curtail power consumption through clock gating. The methodologies expounded in this review adeptly fulfill the objective of power reduction, ensuring that both present and future integrated circuits remain highly efficient. Thus, underscoring the critical role of low-power design in the realm of integrated circuit design.