Advances in Design and Test of Monolithic 3-D ICs

Chaudhuri, Arjun; Banerjee, Sanmitra; Park, Heechun; Kim, Jin-Woo; Murali, Gauthaman; Lee, Edward; Kim, Dae Hyun; Lim, Sung Kyu; Mukhopadhyay, Saibal; Chakrabarty, Krishnendu

doi:10.1109/mdat.2020.2988657

Cited by 7 publications

(3 citation statements)

References 13 publications

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“…[ 28–29 ] Currently, ReRAM has already demonstrated promised opportunities to be applied to high‐density data storage systems, [ 30 ] network applications, [ 31 ] additional memory to increase system performance (SSD, FPGA), [ 32,33 ] as well as in the implementation of 3‐D multilevel architectures. [ 34–36 ]…”

Section: Introductionmentioning

confidence: 99%

“…[28][29] Currently, ReRAM has already demonstrated promised opportunities to be applied to high-density data storage systems, [30] network applications, [31] additional memory to increase system performance (SSD, FPGA), [32,33] as well as in the implementation of 3-D multilevel architectures. [34][35][36] The principle of operation of ReRAM is based on the redox reactions and ion transport under an external voltage of a certain polarity, amplitude, and pulse duration, resulting in the change of electronic properties of the system, i.e., changing the electrical resistance of the metal oxide layer between a highresistance state R HRS and a low-resistance state R LRS . [37][38][39][40][41][42][43] In recent years, significant progress has been made in understanding the mechanism of resistive switching, [44,45] but still research, development and applications rely on empirical studies, rather than on a prognostic concept.…”

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confidence: 99%

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Forming‐Free Resistive Switching of Electrochemical Titanium Oxide Localized Nanostructures: Anodization, Chemical Composition, Nanoscale Size Effects, and Memristive Storage

Tominov

Avilov

Вакулов

et al. 2022

Adv Elect Materials

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Electrochemical anodization is a powerful method for the preparation of oxide thin films with controlled thickness, structure, and composition and proves as a promising approach to be applied to memristive devices. Here, experimental studies on titanium oxide nanoscale structures produced by local anodic oxidation and the influence of the thickness on the memristive properties are presented. Controllable preparation of forming‐free memristive cells with switching voltages less than 3 V are demonstrated. The chemical composition and oxidation state of the elements in the TiOx nanostructures are analyzed by means of X‐ray photoelectron spectroscopy, which reveals the formation of TiO2 (458.4 eV), Ti2O3 (456.6 eV), and TiO (454.8 eV). The increasing thickness of the devices from 4.5 ± 0.7 to 7.9 ± 0.3 nm leads to a decrease in the OFF to ON resistance ratio from 250 to 10.7, respectively. The mechanism of formation and resistive switching in the anodic devices is also discussed. The results can be applied to the design and development of technological processes for memristive structure manufacturing based on electrochemical oxidation.

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Section: Introductionmentioning

confidence: 99%

mentioning

confidence: 99%

Forming‐Free Resistive Switching of Electrochemical Titanium Oxide Localized Nanostructures: Anodization, Chemical Composition, Nanoscale Size Effects, and Memristive Storage

Tominov

Avilov

Вакулов

et al. 2022

Adv Elect Materials

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“…Significant work has been done on the monolithic 3D IC design in recent times, most of which contributed to developing various design concepts of 3D ICs. The studies in this field include developing a face-to-face stacked heterogeneous 3D IC structure [13], exploring various microfluidic cooling mechanisms for 3D ICs [14], studying recent developments in monolithic 3D ICs and the high density and performance benefits [15], designing a logic-on-memory processor using monolithic 3D (M3D) IC techniques [16], developing a design and testing system for M3D ICs [17], comparing the TSV-based 3D structure with M3Ds [18,19], studying the effect of process variation on the performance of M3D ICs [20,21], and developing effective gate-sizing methods to boost circuit speed while considering intra-die process variation [22]. Other related studies include repurposing various components of commercial 2D P&R tools to implement 3D ICs [23][24][25][26].…”

Section: Introductionmentioning

confidence: 99%

Multi-Tier 3D IC Physical Design with Analytical Quadratic Partitioning Algorithm Using 2D P&R Tool

et al. 2021

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In this study, we developed a complete flow for the design of monolithic 3D ICs. We have taken the register-transfer level netlist of a circuit as the input and synthesized it to construct the gate-level netlist. Next, we partitioned the circuit using custom-made partitioning algorithms and implemented the place and route flow of the entire 3D IC by repurposing 2D electronic design automation tools. We implemented two different partitioning algorithms, namely the min-cut and the analytical quadratic (AQ) algorithms, to assign the cells in different tiers. We applied our flow on three different benchmark circuits and compared the total power dissipation of the 3D designs with their 2D counterparts. We also compared our results with that of similar works and obtained significantly better performance. Our two-tier 3D flow with AQ partitioner obtained 37.69%, 35.06%, and 12.15% power reduction compared to its 2D counterparts on the advanced encryption standard, floating-point unit, and fast Fourier transform benchmark circuits, respectively. Finally, we analyzed the type of circuits that are more applicable for a 3D layout and the impact of increasing the number of tiers of the 3D design on total power dissipation.

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