Advantage of Siconi¿ Preclean over Wet Clean for Pre Salicide Applications Beyond 65nm Node

Lei, Jianxin; Phan, See-Eng; Lu, X.; Kao, Chien-Teh; Lavu, Kishore; Moraes, Kevin; Tánaka, Keiichi; Wood, Bingxi; Ninan, Biju; Gandikota, Srinivas

doi:10.1109/issm.2006.4493117

Cited by 13 publications

(10 citation statements)

References 2 publications

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“…Recently, in order to prevent the physical damages by charged particles from the plasma, a damage free remote plasma process has been widely used to clean the wafer surface, especially for the removal of the silicon dioxide or silicon nitride over silicon with high selectivity in semiconductor manufacturing industry. [1][2][3][4][5][6][7] In the damage free remote plasma process, the process system requires two sectionsa plasma reactor and a process region, as shown in Fig. 1.…”

Section: Introductionmentioning

confidence: 99%

“…In this study, two cone-shaped hollow cathode electrode configurations have been investigated and compared their electrical characteristics, discharge modes as well as process performance to define an optimum operating pressure for the mixture gas of He, NF 3 , and NH 3 which is the typical chemistry for selective removals. 3,[5][6][7][25][26][27][28]…”

Section: Introductionmentioning

confidence: 99%

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Optimization of hollow cathode discharge electrode for damage free remote plasma removal process for semiconductor manufacturing

Cho

Han

Yang

et al. 2016

Jpn. J. Appl. Phys.

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Cone-shaped hollow cathode electrode configuration for a damage free remote plasma removal process has been optimized for given pressures based on Paschen characteristic curves, voltage–current characteristics and time-resolved discharge observations as well as oxide film removal performances. Remote plasmas have been generated in two types of cone-shaped electrodes with mixtures of He, NF3, and NH3 for pressure range of 1–30 Torr. Paschen characteristic curves and voltage–current (V–I) characteristics define an operating pressure for low breakdown voltage and the hollow cathode effect to minimize the particles. Sinusoidal voltage waveform and asymmetry electrode configuration alternate the glow discharge and hollow cathode discharge modes in a cycle. The current and infrared emission intensity from the glow discharge increases together for both cone-shaped electrodes with increasing pressure, whereas the hollow cathode discharge plasma emits strong infrared only when pD condition is satisfied. For the wide cone electrode configuration, high voltage operation at higher pressure results in particle contamination on the processed wafer by high energy ion bombardment. Operating at optimum pressure for a given electrode configuration shows faster oxide etch rate with better uniformity over a whole 300 mm wafer.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Optimization of hollow cathode discharge electrode for damage free remote plasma removal process for semiconductor manufacturing

Cho

Han

Yang

et al. 2016

Jpn. J. Appl. Phys.

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“…In order to enable the deposition of a good quality gate dielectric, effective pre-cleaning of the silicon surface is of vital importance. 32,33 Different types of pre-cleaning can be considered, 35 including standard diluted HF cleaning, a remote plasma (RP) cleaning in NF 3 /NH 3 called siconi 36 or a combination of the two. This was followed by an in situ O 3 oxidation to form an interfacial SiO 2 layer (IL-SiO 2 ).…”

Section: Processing Impactmentioning

confidence: 99%

Low Frequency Noise Analysis of Impact of Metal Gate Processing on the Gate Oxide Stack Quality

Claeys

O’Sullivan

et al. 2018

ECS J. Solid State Sci. Technol.

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A review is given about the impact of the metal gate (MG) in a High-κ/Metal Gate (HKMG) stack on the quality and defectivity of the dielectric, assessed by low-frequency (LF) noise spectroscopy. In a first part, processing aspects are discussed, like, the thickness of the MG and the implementation of a gate-last approach. In the latter case, it is shown that both the cleaning (or dummy gate removal), the growth of the interfacial SiO 2 layer (chemical versus thermal) and a post-HfO 2 -deposition heat or SF 6 plasma treatment need to be optimized for reducing the gate oxide trap density. In a second part, different MGs are compared from a viewpoint of noise magnitude. It is generally found that alternatives to the standard TiN gate yield better static and noise performance. Results will be presented both for scaled planar and FinFET technologies; the latter fabricated on either bulk or Silicon-on-Insulator (SOI) substrates. Also results on Gate-All-Around NanoWire FETs (GAA NWFETs) fabricated on SOI will be included.

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“…[18][19][20][21][22][23][24][25][26][27][28][29][30][31][32][33] These chemistries were commercialized in the semiconductor industry for use in precleaning technologies in film deposition, silicidation, and the fabrication of high-k dielectric metal gates. [29][30][31][32][33] Very recently, the thermal cyclic etching of SiN has also been realized. [34][35][36] In principle, a thin surface modified layer comprising (NH 4 ) 2 SiF 6 forms on the surface in a self-limiting manner to protect a material from etching by preventing for the further exposure to etchants and can be removed by thermal annealing.…”

Section: Advances In Atomic Layer Processing For Emerging Materialsmentioning

confidence: 99%

“…A (NH 4 ) 2 SiF 6 -based modified layer forms on the surface of SiO 2 when it is exposed to etchants such as NH 3 =NF 3 -based or HF=NH 3based chemistry. [18][19][20][21][22][23][24][25][26][27][28][29][30][31][32][33] These chemistries were commercialized in the semiconductor industry for use in precleaning technologies in film deposition, silicidation, and the fabrication of high-k dielectric metal gates. [29][30][31][32][33] Very recently, the thermal cyclic etching of SiN has also been realized.…”

Section: Advances In Atomic Layer Processing For Emerging Materialsmentioning

confidence: 99%

Progress and prospects in nanoscale dry processes: How can we control atomic layer reactions?

Ishikawa

Karahashi

Ichikı

et al. 2017

Jpn. J. Appl. Phys.

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In this review, we discuss the progress of emerging dry processes for nanoscale fabrication. Experts in the fields of plasma processing have contributed to addressing the increasingly challenging demands in achieving atomic-level control of material selectivity and physicochemical reactions involving ion bombardment. The discussion encompasses major challenges shared across the plasma science and technology community. Focus is placed on advances in the development of fabrication technologies for emerging materials, especially metallic and intermetallic compounds and multiferroic, and two-dimensional (2D) materials, as well as state-of-the-art techniques used in nanoscale semiconductor manufacturing with a brief summary of future challenges.

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Advantage of Siconi¿ Preclean over Wet Clean for Pre Salicide Applications Beyond 65nm Node

Cited by 13 publications

References 2 publications

Optimization of hollow cathode discharge electrode for damage free remote plasma removal process for semiconductor manufacturing

Optimization of hollow cathode discharge electrode for damage free remote plasma removal process for semiconductor manufacturing

Low Frequency Noise Analysis of Impact of Metal Gate Processing on the Gate Oxide Stack Quality

Progress and prospects in nanoscale dry processes: How can we control atomic layer reactions?

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