1997
DOI: 10.1109/16.556148
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Advantages of LDD-only implanted fluorine with submicron CMOS technologies

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Cited by 6 publications
(2 citation statements)
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“…The position of F-implantation within the DRAM process flow turned out to be of major importance for the retention improvement capability. For implant pre spacer (similar to [10]) no net benefit on retention tail could be observed. We attribute this to potentially introduced additional implant damage within high electric field regions.…”
Section: Resultsmentioning
confidence: 58%
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“…The position of F-implantation within the DRAM process flow turned out to be of major importance for the retention improvement capability. For implant pre spacer (similar to [10]) no net benefit on retention tail could be observed. We attribute this to potentially introduced additional implant damage within high electric field regions.…”
Section: Resultsmentioning
confidence: 58%
“…Depending on F-dose and the way of incorporation, beneficial as well as detrimental effects on CMOS devices have been reported ( [9] and references therein). In order to benefit from the trap passivation capability without negative effects on gate oxide reliability, F implantation only into LDD region has been proposed in [10]. To use fluorine for DRAM retention tail improvement extensive experiments on 512Mbit and 1Gbit BEST DRAM [11] in 110 nm technology have been carried out in this work.…”
Section: Resultsmentioning
confidence: 98%