Aging in CMOS RF Linear Power Amplifiers: An Experimental Study

Abstract

An extensive experimental analysis of the HCI and BTI aging effects on RF linear power amplifiers (PA) is presented in this paper. Two different 2.45 GHz PA topologies have been implemented in a CMOS 65 nm technology, one based on a classical common-source (CS) and choke inductor, another one based on a complementary current-reuse (CR) circuit, both of them producing similar gain and output 1-dB compression point (P-1dB). These circuits have been stressed to produce accelerated aging degradation, by applying increasing supply (VDD) voltages, or increasing RF input powers (PIN). The degradation on the transistor parameters (threshold voltage and mobility), DC bias point (IDC current) and RF performance (gain, matching, compression point) have been simultaneously measured. This has allowed to observe how the reduced transistor degradation in CR PA results in a higher robustness in its RF parameters, compared to CS PA circuit. The equivalent RMS voltages have been proposed as an observable metric to assess the combined DC+RF stress in a PA circuit. This has been applied to a semi-analytical model, thus providing comprehension of the link between the conditions under which a circuit is operated, the degradation of the transistor parameters, and the effects on the DC current and RF performance.

Experimental investigation on the performance degradations of the GaN class-F power amplifier under humidity conditions

“…In the recent past, researchers have shown deep interest in experimental evaluation of the performance of several types of electronic equipment; e.g. capacitors [16], Tx lines [17], random-access-memory (RAM) [18], laser [19], photodiodes [20] and PA [21][22][23][24][25] under different environmental conditions. Most of those works are focused on the humidity and temperature effects on the lifetime of devices.…”

Modeling of the degradation of CMOS inverters under pulsed stress conditions from ‘on-the-fly’ measurements

“…The circuits used in this work (see Figure 1) were fabricated on a commercial 65-nm technology with 1.2 V nominal operation voltage and purposely designed to evaluate aging of RF Low Noise Power Amplifier [at 2.45GHz] [22,26], but in this work they will be operated as inverter under DC stress conditions. The pMOSFET and nMOSFET W/L dimensions were 180µm/60nm, and the gate was split in 45 fingers.…”

Aging Compensation in a Class-A High-Frequency Amplifier with DC Temperature Measurements

“…This is used in experimental studies to accelerate aging phenomena by operating the circuit above nominal voltages, thus stressing the devices. This allows us to observe, after a reasonable time, aging degradation that otherwise would take years to show [ 6 , 7 , 8 ]. Also, this means that aging degradation is naturally more important in devices that operate under large electrical fields.…”

“…Also, this means that aging degradation is naturally more important in devices that operate under large electrical fields. This is the case of Power Amplifiers (PA) in line drivers or RF transmitters, which are circuits in which aging produces degradation of gain, saturated output power, decreased power efficiency or even linearity [ 8 , 9 , 10 , 11 , 12 ].…”