Aging monitoring with local sensors in FPGA-based designs

Leong, C.; Semião, J.; Teixeira, I.C.; Santos, M.B.; Teixeira, J.P.; Valdés, M.D.; Freijedo, J.; Rodríguez-Andina, Juan J.; Vargas, F.

doi:10.1109/fpl.2013.6645596

Cited by 18 publications

(5 citation statements)

References 21 publications

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“…Sensors are usually placed at the end of critical combinational paths, in parallel to a destination register, to detect late transitions. Li et al [56], Valdés et al [55], and Leong et al [53] proposed to place a SR after the CUT, clocked with a signal skewed from the destination register (see Fig. 7).…”

Section: B Shadow Registermentioning

confidence: 99%

A Review of Techniques for Ageing Detection and Monitoring on Embedded Systems

Leandro¹,

Martino²,

Fey³

et al. 2023

Preprint

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Embedded digital devices, such as Field-Programmable Gate Arrays (FPGAs) and Systems on Chip (SoCs), are increasingly used in dependable or safety-critical systems. These commodity devices are subject to notable hardware ageing, which makes failures likely when used for an extended time. It is of vital importance to understand ageing processes and to detect hardware degradations early. In this survey, we describe the fundamental ageing mechanisms and review the main techniques for detecting ageing in FPGAs, microcontrollers, SoCs, and power supplies. The main goal of this work is to facilitate future research efforts in this field by presenting all main approaches in an organized way.

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Section: B Shadow Registermentioning

confidence: 99%

A Review of Techniques for Ageing Detection and Monitoring on Embedded Systems

Leandro¹,

Martino²,

Fey³

et al. 2023

Preprint

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“…One solution is to embed circuits into the IC that respond predictably to aging effects and compare their behavior to a known new model. Typical circuits used for these systems include fuses and antifuses [5], [11], Schmitt-Triggers [27], and ring oscillators [8], [24], [26], [47]. Purpose-built circuits enable high-confidence detection of recycled devices even if the device under test has only been used for a few days; ring-oscillator based systems achieve >99% accuracy within a month of moderate use [11].…”

Section: Aging Detection Circuitsmentioning

confidence: 99%

“…The growing impact of recycled electronics has given rise to several detection strategies. One set of approaches targets future systems by designing in a "silicon odometer", a circuit that responds predictably to aging effects and reveals a device's operating time [1], [8], [11], [26], [47]. Hardware approaches work when implemented by the OEM, but leave past and presently-manufactured devices unserved; the vast majority of ICs built today do not include aging-detection circuitry.…”

Section: Introductionmentioning

confidence: 99%

Silicon Dating

Williams,

Lind,

Parikh

et al. 2020

Preprint

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In order to service an ever-growing base of legacy electronics, both government and industry customers must turn to third-party brokers for components in short supply or discontinued by the original manufacturer. Sourcing equipment from a third party creates an opportunity for unscrupulous gray market suppliers to insert counterfeit devices: failed, knock-off, or otherwise inferior to the original product. This increases the supplier's profits at the expense of reduced performance/reliability of the customer's system. The most challenging class of counterfeit devices to detect is recycled counterfeits: recovered genuine devices which are re-sold as new. Such devices are difficult to detect because they typically pass performance and parametric tests but fail prematurely due to age-related wear.To address the challenge of detecting recycled devices predeployment, we develop Silicon Dating: a low-overhead classifier for detecting recycled integrated circuits using Static Random-Access Memory (SRAM) power-on states. Silicon Dating targets devices with no known-new record or purpose-built anti-recycling hardware. We observe that over time, software running on a device imprints its unique data patterns into SRAM through analog-domain changes; we measure the level and direction of this change through SRAM power-on state statistics. In contrast to highly symmetric power-on states produced by variation during SRAM fabrication, we show that embedded software data is generally highly asymmetric and that the degree of power-on state asymmetry imprinted by software reveals device use. Using empirical results from embedded benchmarks running on several microcontrollers, we show that Silicon Dating identifies recycled devices with 84.1% accuracy with no software-specific knowledge and with 92.0% accuracy by incorporating software knowledgewithout prior device enrollment or modification.

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“…Several ot involved self-characterization but typically ha the measurement precision [7]. In many case at much coarser time scales (tens to hundreds [8]. In one of the most relevant related w created paths in a 65nm FPGA were biased subjected to accelerated stress; data-depende successfully tracked [9].…”

Section: • New Empirical Insight Into Burn-in Of Fpga Lut Contentsmentioning

confidence: 99%

High-precision self-characterization for the LUT burn-in information leakage threat

Zick

French

2014

2014 24th International Conference on Field Programmable Logic and Applications (FPL)

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Information security in FPGAs is at risk; during system operation, data and usage patterns can potentially get imprinted into a chip's physical characteristics, allowing an attacker to later recover intellectual property or cryptographic secrets. Can "data burn-in" vulnerabilities in FPGAs be characterized at low cost? Specifically, can slight shifts in path delays due to burn-in be measured with enough precision? This paper contributes methods for self-characterization of delay changes using novel isolation of key FPGA transistors, improved clock sweeping, and enhanced estimation from launch-andcapture data. Hardware experiments on 2048 Xilinx Kintex-7 paths demonstrate measurement precision of 30-60 femtoseconds, which is more than 10× finer than previous selfcharacterization results. Further, results show that unintentional burn-in of FPGA LUT contents does indeed occur and can in some cases be detected within a single week, highlighting the need to deploy countermeasures.

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Aging monitoring with local sensors in FPGA-based designs

Cited by 18 publications

References 21 publications

A Review of Techniques for Ageing Detection and Monitoring on Embedded Systems

A Review of Techniques for Ageing Detection and Monitoring on Embedded Systems

Silicon Dating

High-precision self-characterization for the LUT burn-in information leakage threat

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