AI-Driven Proactive Content Caching for 6G

Cheng, Guangquan; Jiang, Chi; Yue, Binglei; Wang, Ranran; Alzahrani, Bander A.; Zhang, Yin

doi:10.1109/mwc.021.2200535

Cited by 7 publications

(1 citation statement)

References 13 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…However, it is important to note that cache technology serves as a temporary and interim solution, rather than a permanent resolution to address this challenge. [8,9] In recent years, the development of Compute-in-Memory (CIM) technology has emerged in conjunction with the advancements of new nonvolatile devices, such as resistive random access memories (RRAMs), phase change random access memories (PCRAMs), ferroelectric random access memories (FeRAMs). [10][11][12][13][14][15][16][17] CIM integrates memory and processing functions within the same module, effectively circumventing the challenges that traditional AI chips often encounter.…”

Section: Introductionmentioning

confidence: 99%

Memristor‐Based Neuromorphic Chips

Duan,

Cao,

Gao

et al. 2024

Advanced Materials

View full text Add to dashboard Cite

In the era of information, characterized by an exponential growth in data volume and an escalating level of data abstraction, there has been a substantial focus on brain‐like chips, which are known for their robust processing power and energy‐efficient operation. Memristors are widely acknowledged as the optimal electronic devices for the realization of neuromorphic computing, due to their innate ability to emulate the interconnection and information transfer processes witnessed among neurons. This review paper focuses on memristor‐based neuromorphic chips, which provide an extensive description of the working principle and characteristic features of memristors, along with their applications in the realm of neuromorphic chips. Subsequently, a thorough discussion of the memristor array, which serves as the pivotal component of the neuromorphic chip, as well as an examination of the present mainstream neural networks, is delved. Furthermore, the design of the neuromorphic chip is categorized into three crucial sections, including synapse‐neuron cores, networks on chip (NoC), and neural network design. Finally, the key performance metrics of the chip is highlighted, as well as the key metrics related to the memristor devices are employed to realize both the synaptic and neuronal components.

show abstract