Algorithmic transformations for neural computing and performance of supervised learning on a dataflow machine

Kim, S.T.; Suwunboriruksa, K.; Herath, Susantha; Jayasumana, Anura P.; Herath, Jayantha

doi:10.1109/32.148479

Cited by 3 publications

(1 citation statement)

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“…After the neural core logic was developed and the communication architecture and protocol were decided, the next step was the design of the control system based in the data flow theory [12][13][14].…”

Section: Microcontroller Descriptionmentioning

confidence: 99%

Design of a parallel neural processor

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Randon²

Proceedings of the 1998 Second IEEE International Caracas Conference on Devices, Circuits and Systems. ICCDCS 98. On the 70th A

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The goal of this work is to design a neural processor that compute in a efficient way a Feed-Forward Neural Network. It was accomplished by the design of an optimized product-sum architecture and a microcontroller based on the data flow theory. The architecture prpoposed is faster than some computer implementations like MatLab@ 4.2. Neural Network Toolbox and language "C" program. INTRODUCTIONThe main issue of this work was to develop a logical architecture that compute, in an efficient way, the equations used in a Feed-Forward Neural Network (FFNN) [l-21. First, a deep analysis was made in order to design a logical subsystem to evaluate these basic equations in the fastest way. Then, it was studied the data flow [3] within the FFNN and being proposed a bus net scheme of interconnection between the layers [4]. Finally, it was decided to use a data flow microcontroller in order to optimize the processing time and reduce the time used by the process between iterations.

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Section: Microcontroller Descriptionmentioning

confidence: 99%