Algorithms in the Ultra-Wide Word Model

Abstract

Abstract. The effective use of parallel computing resources to speed up algorithms in current multi-core parallel architectures remains a difficult challenge, with ease of programming playing a key role in the eventual success of various parallel architectures. In this paper we consider an alternative view of parallelism in the form of an ultra-wide word processor. We introduce the Ultra-Wide Word architecture and model, an extension of the word-ram model that allows for constant time operations on thousands of bits in parallel. Word parallelism as exploited by the word-ram model does not suffer from the more difficult aspects of parallel programming, namely synchronization and concurrency. For the standard word-ram algorithms, the speedups obtained are moderate, as they are limited by the word size. We argue that a large class of word-ram algorithms can be implemented in the Ultra-Wide Word model, obtaining speedups comparable to multi-threaded computations while keeping the simplicity of programming of the sequential ram model. We show that this is the case by describing implementations of Ultra-Wide Word algorithms for dynamic programming and string searching. In addition, we show that the Ultra-Wide Word model can be used to implement a nonstandard memory architecture, which enables the sidestepping of lower bounds of important data structure problems such as priority queues and dynamic prefix sums. While similar ideas about operating on large words have been mentioned before in the context of multimedia processors [37], it is only recently that an architecture like the one we propose has become feasible and that details can be worked out.

Partial Sums on the Ultra-Wide Word RAM

“…al. [12] we distinguish between the restricted UWRAM that supports a minimal set of instructions on ultrawords consisting of addition, subtraction, shifts, and bitwise boolean operations and the multiplication UWRAM that extends the instruction set of the restricted UWRAM with a multiplication operation on ultrawords. We show the following main result: Theorem 1 Given an array A of n w-bit integers, we can construct in-place partial sums data structures for A that support sum and update operations in O(log log n) time on a restricted UWRAM.…”

“…al. [12] (with parameter τ = Θ(log log n) while improving the space overhead from O(nw log n) to a constant number of ultrawords. This is important in practical applications since modern vector processors have a very limited number of ultrawords available.…”

“…The ultra-wide word RAM (UWRAM) model of computation [12] extends the word RAM model with special ultrawords of w 2 bits. We distinguish between the restricted UWRAM that supports a minimal set of instructions on ultrawords consisting of addition, subtraction, shifts, and bitwise boolean operations and the multiplication UWRAM that additionally supports multiplication.…”

“…More recently, Farzan et al [12] introduced the ultra-wide word RAM (UWRAM) model of computation. The UWRAM model also extends the word RAM model, but with special ultrawords of length w 2 bits.…”

“…We present the details of the UWRAM model in Section 2. Farzan et al [12] showed how simulate algorithms on RAMBO model on the UWRAM model at the cost of slightly increasing space. Simulating the above solution for partial sums they gave a time-space trade-off for partial sums that uses O(n w/2 τ + nw log n) space and supports operations in O(τ ) time and for a parameter τ , 1 ≤ τ ≤ log log n. For constant τ , this is O(n w + nw log n) space and constant time, for any > 0, and for τ = log log n this is O(nw log log n) space and O(log log n) time.…”