2022
DOI: 10.3389/felec.2022.833260
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All-in-Memory Brain-Inspired Computing Using FeFET Synapses

Abstract: The separation of computing units and memory in the computer architecture mandates energy-intensive data transfers creating the von Neumann bottleneck. This bottleneck is exposed at the application level by the steady growth of IoT and data-centric deep learning algorithms demanding extraordinary throughput. On the hardware level, analog Processing-in-Memory (PiM) schemes are used to build platforms that eliminate the compute-memory gap to overcome the von Neumann bottleneck. PiM can be efficiently implemented… Show more

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Cited by 20 publications
(3 citation statements)
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“…TCAMs have clear applications, such as network routers and CPU caches, but a conventional TCAM cell with 16 transistors has severe limitations due to its high energy consumption and large cell area [63]. Recently, a 2FeFET-based TCAM design has been reported to improve energy efficiency and operation speed [56,[64][65][66][67]. Based on the 1T AND function, figure 5(a) depicts the 2FeFET-based TCAM design.…”
Section: The Role Of Ferroelectrics In Emerging Computing Systemsmentioning
confidence: 99%
“…TCAMs have clear applications, such as network routers and CPU caches, but a conventional TCAM cell with 16 transistors has severe limitations due to its high energy consumption and large cell area [63]. Recently, a 2FeFET-based TCAM design has been reported to improve energy efficiency and operation speed [56,[64][65][66][67]. Based on the 1T AND function, figure 5(a) depicts the 2FeFET-based TCAM design.…”
Section: The Role Of Ferroelectrics In Emerging Computing Systemsmentioning
confidence: 99%
“…State-of-the-art FeFET based IMC architectures have been limited to binary logical operations, specifically logical AND and XNOR [7][8][9][10][11] . These operations are restricted to storing only two states within the FeFET memory cell.…”
mentioning
confidence: 99%
“…that the reliability of FeFET can impair the performance of dependent systems [11], [12]. In light of this, Hyperdimensional Computing (HDC) is a newly-developed Machine Learning algorithm that runs on this unreliable hardware based on CiM architectures [13], [14]. This is made possible by calculating a Hamming distance (HD) using TCAM arrays within the memory itself.…”
mentioning
confidence: 99%