All-Optical Address Decoder Using Injection-Locking Property of External-Cavity-Based Single-Mode FP-LD

Abstract

A novel all-optical address decoder (AOAD) using an external-cavity-based single-mode Fabry-Pe ´rot laser diode (SMFP-LD) is proposed and demonstrated. The proposed AOAD is the combination of logic gates that are cascaded together to give specific functions of the decoder. The working principles of all logic gates are based on the singleand multi-input injection-locking properties of SMFP-LD. The outputs of the proposed AOAD have contrast ratios of above 27 dB in the spectrum domain, clear waveforms, and clear eyes diagrams with good BER at the data rate of 10 Gb/s. The proposed AOAD has several advantages such as a simple and cascadable structure, low cost, and low bias current (below 19 mA) compared with other optical technologies.

An all-passive Si3N4 optical row decoder circuit for addressable optical RAM memories

“…Fetching data from the memory in current computing architectures is still carried out at a lower speed compared to the processing speed offered by the CPUs, a problem that has been already identified a few decades ago and is typically referred to as the "Memory Wall [1]. The efforts to overcome the speed limitations of electronic random-access memories (RAM) led to the introduction of a plethora of optical memory and optical RAM technologies during the last two decades [2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20], with the main target being the transfer of the high-speed capabilities of photonic technologies into the memory segment. This aims at creating a seamless interface between the optical memory and the optical bus waveguide, enabling a transition into a data fetching and storing paradigm that can be performed exclusively in the optical domain.…”

“…Taking, however, the next logical step towards fully integrated on-chip addressable optical RAM banks and optical cache memories requires not only the integration of RAM cells, but also the on-chip transfer of optical RAM peripheral circuitry, including column/row decoders (RDs) [13,14] and tag comparators [12]. RDs, for example, have been already reported via different technology and operational concepts, relying either on injection locking mechanisms [15] or on single-mode Fabry-Perot Laser diodes [16] and semiconductor optical amplifier (SOA)-based configurations [14,17]. All these deployments employ active optical structures for guiding the incoming optical signal to the selected output row, requiring electrical power supply for their successful operation.…”

Column Address Selection in Optical RAMs With Positive and Negative Logic Row Access

“…1(a). Although an optical RAM RD and CD deployment version could in principle just mimic the architectures of the respective electronic RAM peripheral modules with active optical elements performing the logical Boolean operations [14], [15], the optical version of these elements allows for introducing the wavelength dimension in RAM layouts. This certainly adds one more degree of freedom in system parallelization enabling Wavelength Division Multiplexing (WDM) concepts into optical RAM architectures, leading to simpler optical RAM peripheral circuits with enhanced degree of hardware resource sharing.…”