An 8b 1GS/s 2.55mW SAR-Flash ADC with Complementary Dynamic Amplifiers

Oh, Dong-Ryeol; Moon, Kyong Whan; Lim, Won-Mook; Kim, Ye-Dam; An, Eun-Ji; Ryu, Seung‐Tak

doi:10.1109/vlsicircuits18222.2020.9163064

Cited by 12 publications

(2 citation statements)

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“…VI, we observe that the ADC resource usage is significantly higher than the other components. Therefore, we discuss the expected impact of using an ADC with smaller resolution compared to our selected 8-bit ADC from [21].…”

Section: H Discussion Of Adc Modificationsmentioning

confidence: 99%

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Unlocking Efficiency in BNNs: Global by Local Thresholding for Analog-Based HW Accelerators

Yayla,

Frustaci,

Spagnolo

et al. 2023

IEEE J. Emerg. Sel. Topics Circuits Syst.

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For accelerating Binarized Neural Networks (BNNs), analog computing-based crossbar accelerators, utilizing XNOR gates and additional interface circuits, have been proposed. Such accelerators demand a large amount of analog-to-digital converters (ADCs) and registers, resulting in expensive designs. To increase the inference efficiency, the state of the art divides the interface circuit into an Analog Path (AP), utilizing (cheap) analog comparators, and a Digital Path (DP), utilizing (expensive) ADCs and registers. During BNN execution, a certain path is selectively triggered. Ideally, as inference via AP is more efficient, it should be triggered as often as possible. However, we reveal that, unless the number of weights is very small, the AP is rarely triggered. To overcome this, we propose a novel BNN inference scheme, called Local Thresholding Approximation (LTA). It approximates the global thresholdings in BNNs by local thresholdings. This enables the use of the AP through most of the execution, which significantly increases the interface circuit efficiency. In our evaluations with two BNN architectures, using LTA reduces the area by 42x and 54x, the energy by 2.7x and 4.2x, and the latency by 3.8x and 1.15x, compared to the stateof-the-art crossbar-based BNN accelerators.

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Section: H Discussion Of Adc Modificationsmentioning

confidence: 99%

“…28nm). In particular, we selected the ADC in [21] for our study because it can be inferred from the survey in [26] that it has the best area and energy tradeoff among the reported 28nm ADCs. In a similar way, we selected the analog comparator in [20] since it has the best performance among the 28nm comparators we could find in the literature.…”

Section: Casementioning

confidence: 99%