An Accurate Jitter Estimation Technique for Efficient High Speed I/O Testing

Abstract

This paper describes a technique for estimating total jitter that, along with a loopback-based margining test, can be applied to test high speed serial interfaces. We first present the limitations of the existing estimation method, which is based on the dual-Dirac model. The accuracy of the existing method is extremely sensitive to the choice of the fitting region and the ratio of deterministic jitter to random jitter. Then, we propose a high-order polynomial fitting technique and demonstrate its value for a more efficient and accurate total jitter estimation at a very low Bit-Error-Rate level. The estimation accuracy is also analyzed with respect to different numbers of measurement points for fitting. This analysis shows that only a very small number (i.e., 4) of measurement points is needed for achieving accurate estimation.16th IEEE Asian Test Symposium

Comparison of jitter decomposition methods for BER analysis of high-speed serial links

“…This principle was first proposed in [1] and subsequently also described in [8]. The second class of methods considers higher order polynomials for regression analysis in Q-domain and was suggested by Hong in [2]. Instead of the linear regression, we can basically also utilize higher order polynomials, and thus fit polynomial functions to the distribution tails instead of the simple lines.…”

“…This means, the polynomial methods described in [2] always omit the scaling factor k. Additionally, the resulting coefficients for p≥2 can not be used for jitter decomposition with eq. (3), but only for tail extrapolation.…”

“…Different distribution shapes have become common for testing [2], [10]. They are usually composed of Gaussian RJ and bounded DJ, both characterized by the standard deviation σ RJ and the amplitude A DJ .…”

“…We use a recently proposed method [3] for comparison with different polynomial fitting methods according to [1] and [2]. Obviously, also a chi-squared test for Gaussian tail search, as used in [4] would be a prominent candidate, but is omitted here because of the highly individual structure of such algorithms.…”

Design Techniques for High-Speed I/Os: Challenges and Opportunities

“…Alternatively, the opening of data eyes can be used to guide DFE search [71,72]. Eye-opening can be captured using an Eye-Opening Monitor (EOM) [73][74][75][76][77][78][79][80][81]. Jitter-based eye-opening monitors that minimize timing jitter at the edges of data eyes also emerged [82].…”