An adaptive cache replacement policy based on fine-grain reusability monitor

Bang, D. Y.; Kee, Minkwan; Lim, Hong-Yeol; Park, Gi-Ho

doi:10.1587/elex.14.20171099

Cited by 2 publications

(2 citation statements)

References 5 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Another adaptive cache replacement policy select blocks by monitoring their reuse characteristics [Bang et al 2018]. The authors categorize the blocks as reuse or non-reuse, and as dirty or clean.…”

Section: Related Workmentioning

confidence: 99%

Coherence State Awareness in Way-Replacement Algorithms for Multicore Processors

Souza¹,

Freitas²,

Pétrot

2019

Anais Do XX Simpósio Em Sistemas Computacionais De Alto Desempenho (SSCAD 2019)

View full text Add to dashboard Cite

Due to their performance impact on program execution, cache replacement policies in set-associative caches have been studied in great depth. Currently, most general-purpose processors are multi-core, and among the very large corpus of research, and much to our surprise, we could not find any replacement policy that does actually take into account information relative to the sharing state of a cache way. Therefore, in this paper we propose to add, as a complement to the classical time-based related way-selection algorithms, an information relative to the sharing state and number of sharers of the ways. We propose several approaches to take this information into account, and our simulations show that LRU-based replacement policies can be slightly improved by them. Also, a much simpler policy, MRU, can be improved by our strategies, presenting up to 3.5× more IPC than baseline, and up to 82% less cache misses.

show abstract

Section: Related Workmentioning

confidence: 99%

Coherence State Awareness in Way-Replacement Algorithms for Multicore Processors

Souza¹,

Freitas²,

Pétrot

2019

Anais Do XX Simpósio Em Sistemas Computacionais De Alto Desempenho (SSCAD 2019)

View full text Add to dashboard Cite

show abstract

“…8 Mbytes) [7], utilizing last-level cache (LLC) is more flexible and promising. Prior LLC management schemes partition cache to isolate memory traffic with different characteristics and optimize resource allocation [8,9,10], or propose the optimal cache line replacement policy by accurately estimating reuse distance [11,12,13,14,15,16,17,18,19]. Some propose both partition and replacement scheme [20,21].…”

Section: Introductionmentioning

confidence: 99%

IP-aware cache partition and replacement scheme for mobile computing devices

Kim

Lee

2019

IEICE Electron. Express

View full text Add to dashboard Cite

Mobile computing devices employ multiple task-specific IP cores to improve performance and energy. With the main memory shared by all CPU cores and IPs, it becomes a critical bottleneck as increasing multimedia IPs consume significant memory bandwidth whereas the improvement of memory bandwidth lags behind. We propose an IP-aware cache management scheme for the last-level cache to reduce the load on the main-memory, while satisfying QoS requirements of frame-based multimedia applications. Evaluation with CPU applications and 4 K/ 60 fps video streaming applications shows that our proposed scheme reduces DRAM bandwidth by 28.62% on average over LRU and completely avoids frame-drops.

show abstract

An adaptive cache replacement policy based on fine-grain reusability monitor

Cited by 2 publications

References 5 publications

Coherence State Awareness in Way-Replacement Algorithms for Multicore Processors

Coherence State Awareness in Way-Replacement Algorithms for Multicore Processors

IP-aware cache partition and replacement scheme for mobile computing devices

Contact Info

Product

Resources

About