An adaptive calibration technique of timing skew mismatch in time-interleaved analog-to-digital converters

Abstract

Because of the exponential increase of sampling rate, time-interleaved analog-to-digital converter (TIADC) has a fast growth in the high-speed applications. However, the channel mismatch error is a serious challenge for the performance of TIADC. In this article, we address the timing skew mismatch error and propose a novel adaptive calibration method. The principle and operating process of the calibration algorithm are explained. To validate the proposed technique, we designed a four-channel TIADC-based digital oscilloscope with a sampling rate of 10 GS/s. Based on this instrumentation platform, (i) calibration algorithm was implemented by hardware; and (ii) a test platform consisting of advanced instruments and tools was setup to testify the effect and robustness of proposed algorithm. Moreover, the technical details of instrumentation are described for the first time. The experimental results show that the calibration algorithm significantly suppresses the distortions due to timing skew mismatch error. The TIADC-based instrumentation achieves spurious-free dynamic range of 52.48 dB and effective number of bits of 5.83 bit, respectively. Besides, the complexity of the proposed algorithm is compared and discussed.

The Research on the Signal Generation Method and Digital Pre-Processing Based on Time-Interleaved Digital-to-Analog Converter for Analog-to-Digital Converter Testing

“…However, there is a problem in the actual circuit that it is difficult to achieve a strict multiple relationship of the resistance value due to the accuracy of the resistance. In addition, the thermal noise of the resistance [15], the asynchronous transmission delay of the amplifier [16] and the asynchronous output of different DACs will also have a greater impact on the system output, resulting in a reduction in the signalto-noise ratio (SNR) of the output signal.…”

“…However, there is a problem in the actual circuit that it is difficult to achieve a strict multiple relationship of the resistance value due to the accuracy of the resistance. In addition, the thermal noise of the resistance [15], the asynchronous transmission delay of the amplifier [16] and the asynchronous output of different DACs will also have a greater impact on the system output, resulting in a reduction in the signal-tonoise ratio (SNR) of the output signal. Considering the influence of power supply on DAC reference voltage and amplifier [17][18][19], the influence of temperature on resistance noise [20][21][22], without considering the additional processing of power supply, the time alternating circuit we designed needs to use the same type of DACs and the same channel structure and avoid the use of resistance weighted network [23].…”

General Analysis of Resolution Enhancement on Time-Synchronized Sampling and its Multi-Resolution Solution in 20GSPS Acquisition System

“…The relevant configuration parameters are introduced as follows: the original ADC resolution is b = 8; then, we set M = 1, 2, 4, 8 respectively and let σ/q increase with a minor step 0.1 in one curve. Different EBOB curves in (17) are plotted in FIGURE 5 for different M associated with σ/q, which are represented by different symbols '×', '+' and ' * ' in terms of M = 2, 4, 8 respectively. From this figure, the theoretical analysis almost coincides with the simulated results and the optimal EBOB is marked by a star ' '.…”

“…The most challenge is the mismatch error calibration between multiple ADCs. Motivated by this, mixed signal calibration [13]- [15] and blind digital processing calibration [16], [17] have been researched. The sampling rate and analog bandwidth of these DASs can be achieved by these techniques.…”

Theory of Quantization-Interleaving ADC and Its Application in High-Resolution Oscilloscope

“…Therefore, error estimation and calibration methods have been proposed to suppress the spurious components and restore the dynamic performance of sub-ADCs. Specifically, the mixed signal compensation [16]- [18] and blind signal calibration techniques [19], [20] have been extensively studied. Besides, digital bandwidth interleaving (DBI) and asynchronous time interleaving (ATI) techniques enlarge the sampling rate and digital bandwidth by frequency interleaving as reported in [21]- [23], but the challenge is the frequency response equalization problem for filter banks [24].…”