An adaptive FET sizing technique for high efficiency thermoelectric harvesters

Abstract

Abstract-A theoretical analysis of losses in low power thermoelectric harvester interfaces is used to find expressions for properly sizing the power transistors according to the input voltage level. These expressions are used to propose an adaptive FET sizing technique that tracks the input voltage level and automatically reconfigures the converter in order to improve its conversion efficiency. The performance of a low-power thermoelectric energy harvesting interface with and without the proposed technique is evaluated by circuit simulations under different input voltage/power conditions. The simulation results show that the proposed technique improves the conversion efficiency of the energy harvesting interface up to 12% at the lowest input voltage/power levels.

A High-Efficiency Energy Harvesting Interface for Implanted Biofuel Cell and Thermal Harvesters

“…There are three possible methods to perform this improvement. The first method is to adjust the power transistors' widths to track the optimal values [13]. This technique is relatively simple to implement and successfully reduces the total losses of the converter.…”

“…This switch contributes with conduction and switching losses whose sum can be expressed as: where f s is the switching frequency of the converter, f h is the frequency of connecting different harvesters, k is the power consumption factor of a driver circuit, R N is the resistance per unit width, C N is the gate capacitance per unit width and W EN is the width of the inductor sharing switch. It is interesting to notice that, if the leakage losses are neglected, the relations between the optimal transistors' widths can be derived [13] as:…”

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