An adaptive partition-based multicast routing scheme for mesh-based Networks-on-Chip

Wang, Zheng; Gu, Huaxi; Yang, Yong; Zhang, Haibo; Chen, Yawen

doi:10.1016/j.compeleceng.2016.01.021

Cited by 16 publications

(6 citation statements)

References 25 publications

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“…Various efforts have been devoted to avoiding multicast deadlock in NoCs, which can broadly be classified into two categories: 1) primarily through router architecture modifications referred to as tree-based routing [18], [19], [20], [21], [22], [23], [24], and 2) a labeling rule-based routing technique referred to as path-based routing [13], [14], [15], [16], [17], as shown in Fig. 2.…”

Section: Background and Related Workmentioning

confidence: 99%

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MRCN: Throughput-Oriented Multicast Routing for Customized Network-on-Chips

Lee

Kim

Han

2023

IEEE Trans. Parallel Distrib. Syst.

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The relentless proliferation of big data and artificial intelligence has compelled computing platform architectures to evolve into heterogeneous multicores for greater energy efficiency. A customized network-on-chip (NoC) supporting interconnection diversity is pivotal for the asymmetric data-access traffic requirements of modern heterogeneous multicore system-on-chip (SoC). A significant portion of on-chip data access comprises single-source multi-destination (SSMD) traffic, which supports barrier synchronization, multi-threading, cache coherency protocols, and deep neural network (DNN) acceleration. By amortizing SSMD traffic, multicast routing is essential for effectively utilizing communication bandwidth. One of the primary concerns in supporting multicast routing in NoCs is to circumvent the additional deadlock conditions caused by branch operations among the active routers. However, it is challenging to implement the throughput-optimized multicast routing in irregular topology-based NoCs because the deadlock conditions become highly complicated, and the Hamiltonian path required to apply the labeling rule may not exist. Two important observations were identified regarding multicast routing in customized NoCs: 1) Even if the NoC lacks a Hamiltonian path, deadlock-freedom can be guaranteed by restricting branch operations to a specific destination. 2) A variable path diversity in a custom topology can be leveraged in routing path allocation and branch. Based on these properties, this study proposes a deadlock-free and throughput-enhanced multicast routing for customized NoC (MRCN). MRCN ensures deadlock freedom by utilizing extended routing and router labeling rules. Furthermore, destination router partitioning and traffic-aware adaptive branching are incorporated to reduce packet routing hops and disperse channel traffic. The effectiveness of MRCN was verified using Noxim, a well-known cycle-accurate NoC simulator, under various topologies and traffic patterns. The simulation revealed that MRCN improved the average latency by 13.98 % and the throughput by 12.16 % under the saturated traffic conditions over the previous multicast routings in customized NoCs.

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Section: Background and Related Workmentioning

confidence: 99%

“…Numerous efforts have addressed this problem by providing more hardware resources, such as virtual channel (VC), deeper input buffer, and deadlock recovery logic within the router [18], [19], [20], [21], [22], [23], [24]; however, the throughput improvements were limited since the topological characteristics of customized NoCs were not adequately reflected.…”

mentioning

confidence: 99%

MRCN: Throughput-Oriented Multicast Routing for Customized Network-on-Chips

Lee

Kim

Han

2023

IEEE Trans. Parallel Distrib. Syst.

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“…Dual virtual channels were used in recursive partitioning multicast [11] and improved minimal multicast routing [12] to avoid deadlock. According to [13], the authors solved the cyclic dependency deadlock by adaptively selecting a routing path based on the downstream router's remaining buffer size.…”

Section: A Multicast Routingmentioning

confidence: 99%

“…We used Synopsys VCS, a commonly used tool for SoC design in industry and academics, to perform cycle-accurate simulation. CTR was modeled by exploiting stalled process, branch operation, and bit-string encoding packet format of state-of-the-art tree-based multicast routers [6], [11], [12], [13], [14].…”

Section: Evaluation a Simulation Setupmentioning

confidence: 99%

MRBS: An Area-Efficient Multicast Router for Network-on-Chip Using Buffer Sharing

2021

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Network-on-chip (NoC) has become the mainstream fabric architecture for chip multiprocessor (CMP) design. Owing to the market-driven advancement of modern applications in CMP, multicast traffic is aggressively increasing to support barrier synchronization, multithreading, and cache coherence protocols. Although multicast by branching of packets in the NoC router facilitates shortest path routing, additional branching-induced deadlocks must be circumvented. Existing NoC studies on deadlock-free minimal path routing in multicast traffic have typically deployed additional virtual channels or large buffers to hold entire packets, thereby significantly increasing the router area. Focusing on the area-efficient solution while sustaining the performance, we propose a novel multicast router using buffer sharing (MRBS) to guarantee deadlock-free multicast routing by exploiting the spatial diversity of the input buffer. MRBS ensures minimal path routing without requiring additional virtual channels or large buffers to hold entire packets. Extensive experiments were conducted by varying the buffer, packet, and network sizes, as well as the number of destinations per packet, under random multicast traffic with diverse injection rates. Simulation results show that MRBS achieves a 39.3 % improvement in the area-delay product on average for various network sizes compared to the conventional tree-based router. INDEX TERMSArea-efficient design, buffer sharing, deadlock recovery, multicast communication, network-on-chip, router architecture, tree-based routing Author et al.: Preparation of Papers for IEEE TRANSACTIONS and JOURNALS

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“…To reduce the latency in multicast packets, the path-based routing algorithm proposed in [21] selects the available output channel according to the size of buffer space in downstream routers based on the destination partitions. Authors in [22] proposed a balanced partitioning method in a 3D NoC which is an extended version of dualpath, multipath and column-path method.…”

Section: Related Workmentioning

confidence: 99%

Efficient On-Chip Multicast Routing based on Dynamic Partition Merging

Tiwari

Yang

Jiang

et al. 2020

2020 28th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)

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Networks-on-chips (NoCs) have become the mainstream communication infrastructure for chip multiprocessors (CMPs) and many-core systems. The commonly used parallel applications and emerging machine learning-based applications involve a significant amount of collective communication patterns. In CMP applications, multicast is widely used in multithreaded programs and protocols for barrier/clock synchronization and cache coherence. Multicast routing plays an important role on the system performance of a CMP. Existing partition-based multicast routing algorithms all use static destination set partition strategy which lacks the global view of path optimization. In this paper, we propose an efficient Dynamic Partition Merging (DPM)based multicast routing algorithm. The proposed algorithm divides the multicast destination set into partitions dynamically by comparing the routing cost of different partition merging options and selecting the merged partitions with lower cost. The simulation results of synthetic traffic and PARSEC benchmark applications confirm that the proposed algorithm outperforms the existing path-based routing algorithms. The proposed algorithm is able to improve up to 23% in average packet latency and 14% in power consumption against the existing multipath routing algorithm when tested in PARSEC benchmark workloads.

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An adaptive partition-based multicast routing scheme for mesh-based Networks-on-Chip

Cited by 16 publications

References 25 publications

MRCN: Throughput-Oriented Multicast Routing for Customized Network-on-Chips

MRCN: Throughput-Oriented Multicast Routing for Customized Network-on-Chips

MRBS: An Area-Efficient Multicast Router for Network-on-Chip Using Buffer Sharing

Efficient On-Chip Multicast Routing based on Dynamic Partition Merging

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