An Adiabatic Capacitive Artificial Neuron With RRAM-Based Threshold Detection for Energy-Efficient Neuromorphic Computing

Abstract

In the quest for low power, bio-inspired computation both memristive and memcapacitive-based Artificial Neural Networks (ANN) have been the subjects of increasing focus for hardware implementation of neuromorphic computing. One step further, regenerative capacitive neural networks, which call for the use of adiabatic computing, offer a tantalising route towards even lower energy consumption, especially when combined with 'memimpedace' elements. Here, we present an artificial neuron featuring adiabatic synapse capacitors to produce membrane potentials for the somas of neurons; the latter implemented via dynamic latched comparators augmented with Resistive Random-Access Memory (RRAM) devices. Our initial 4-bit adiabatic capacitive neuron proof-of-concept example shows 90% synaptic energy saving. At 4 synapses/soma we already witness an overall 35% energy reduction. Furthermore, the impact of process and temperature on the 4-bit adiabatic synapse shows a maximum energy variation of 30% at 100 o C across the corners without any functionality loss. Finally, the efficacy of our adiabatic approach to ANN is tested for 512 & 1024 synapse/neuron for worst and best case synapse loading conditions and variable equalising capacitance's quantifying the expected trade-off between equalisation capacitance and range of optimal power-clock frequencies vs. loading (i.e. the percentage of active synapses).

Adiabatic Leaky Integrate-and-Fire Neurons with Tunable Refractory Period in 180nm CMOS Technology for Ultra-Low Energy Brain-Inspired Neuromorphic Computing

“…Finally, in fig. 3l, our performance are compared to the adiabatic results at f LC =1 MHz of [23]. In particular, we achieve a 13× reduction of the synapse energy, i.e.…”

“…k Comparison between the adiabatic MEP at f LC =500 kHz and the corresponding energy in non-adiabatic mode. j Comparison between the synapse energy of this work at f LC =1 MHz (neglecting the energy of the comparator in the neurons) and the result of [23].…”

“…In previous literature, the resonant adiabatic driving was successfully employed to compute Multiply-and-Accumulate (MAC) operations [23,29]. As sketched in fig.…”

“…1b, implies the dissipation in the driving circuitry of an energy comparable to the energy stored in the capacitor itself. Thus, in the quest for a further leap forward in the energy efficiency of neuromorphic hardware and in-memory-computing, the adiabatic operation of the capacitors seems very attractive [20,23].…”

“…This was due to the challenges in the design of logic gates and of multi-phase power-clock generators, to the penalty in dynamic performance [24], as well as to the fact that the adiabatic operation can effectively suppress the dynamic energy but not as much the static leakage energy, whose impact has become comparatively more important with the scaling of CMOS technologies and at low operating frequencies. The adiabatic operation can be much more rewarding in neuromorphic circuits employing capacitive synapses [20,23], because these bio-inspired circuits inherently target a relatively low-frequency operation and, moreover, the dynamic energy consumption tends to dominate the static dissipation due to the use of quite large capacitors.…”