True Random Number Generator (TRNG) is built on hardware-based non-deterministic noise for generating keys, initialization vectors, and random numbers, and it plays an important role in various applications that require encryption protection.In this paper, a true random number generator based on MUX unit multi-phase sampling is proposed by studying the frequency jitter mechanism. The scheme is based on the "soft macro" design of the MUX unit, which replaces the traditional look-up table entropy scheme. It completes high-precision jitter sampling on the basis of ensuring the fairness of the TRNG entropy source, and can be well transplanted to a series of FPGAs. The proposed TRNG is verified on three FPGAs of Xilinx Virtex-6, Artix-7 and Virtex-7. The experimental results show that the generated random sequences are of good quality, passing the NIST SP800- 22 tests with higher p-value and NIST SP 800-90B tests with higher minimum entropy, while achieving 100Mbps throughput. It is worth mentioning that the resource overhead consumed by the proposed TRNG is small and unitary, only consuming 4 MUX units, 4 DFFs and 1 LUT unit, which has a good application prospect.