2024
DOI: 10.1007/s10470-023-02246-9
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An all-digital low-power, low-frequency GRO-based time to digital converter for biomedical applications

Elnaz Zafarkhah,
Maryam Zare,
Nima S. Anzabi-Nezhad
et al.
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“…The paper [14] adopts a comparator structure circuit to do the sampling, which effectively reduces the occurrence of sampling error and improves the linearity of the TDC, which also requires time correction processing, has a more complex structure, and the dual delay loop is susceptible to PVT. The paper [20] proposed a Gated Ring Oscillator (GRO)architecture to reduce the area and power consumption. Nevertheless, it adopts a D ip-op for the sampling with a resolution of 1.76 ns at 1KS/s sampling frequency.…”
Section: Analysis and Discussion Of Simulation Resultsmentioning
confidence: 99%
“…The paper [14] adopts a comparator structure circuit to do the sampling, which effectively reduces the occurrence of sampling error and improves the linearity of the TDC, which also requires time correction processing, has a more complex structure, and the dual delay loop is susceptible to PVT. The paper [20] proposed a Gated Ring Oscillator (GRO)architecture to reduce the area and power consumption. Nevertheless, it adopts a D ip-op for the sampling with a resolution of 1.76 ns at 1KS/s sampling frequency.…”
Section: Analysis and Discussion Of Simulation Resultsmentioning
confidence: 99%