An analytical framework for area and switching power optimization of a fixed-point FFT algorithm

Kabi, Bibek; Mohanty, Ramanarayan; Sahoo, Subhasmita; Routray, Aurobinda

doi:10.1109/techsym.2014.6808060

Cited by 1 publication

(2 citation statements)

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“…Efficient implementation in hardware architectures like ASIC and FPGA requires minimization of silicon area, latency and power consumption. The optimization rule is given as follows:

min ((), C ((), w))

subject to

italicSQNR ((), w) \geq S Q N R_{m i n}

M S E ((), w) < M S E_{bound},

where C ( w ) is the implementation cost, w is the vector containing the WLs of all variables and MSE and SQNR are the error metrics with MSE bound and SQNR min as the maximum and minimum bounds . A hardware cost estimation model is necessary for a fast optimization process.…”

Section: Numerical Accuracy Evaluationmentioning

confidence: 99%

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Development of numerical linear algebra algorithms in dynamic fixed‐point format: a case study of Lanczos tridiagonalization

Pradhan

Kabi

Mohanty

et al. 2015

Circuit Theory & Apps

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SUMMARYProper range and precision analysis play an important role in the development of fixed-point algorithms for embedded system applications. Numerical linear algebra algorithms used to find singular value decomposition of symmetric matrices are suitable for signal and image-processing applications. These algorithms have not been attempted much in fixed-point arithmetic. The reason is wide dynamic range of data and vulnerability of the algorithms to round-off errors. For any real-time application, the range of the input matrix may change frequently. This poses difficulty for constant and variable fixed-point formats to decide on integer wordlengths during float-to-fixed conversion process because these formats involve determination of integer wordlengths before the compilation of the program. Thus, these formats may not guarantee to avoid overflow for all ranges of input matrices. To circumvent this problem, a novel dynamic fixed-point format has been proposed to compute integer wordlengths adaptively during runtime. Lanczos algorithm with partial orthogonalization, which is a tridiagonalization step in computation of singular value decomposition of symmetric matrices, has been taken up as a case study. The fixed-point Lanczos algorithm is tested for matrices with different dimensions and condition numbers along with image covariance matrix. The accuracy of fixed-point Lanczos algorithm in three different formats has been compared on the basis of signal-toquantization-noise-ratio, number of accurate fractional bits, orthogonality and factorization errors. Results show that dynamic fixed-point format either outperforms or performs on par with constant and variable formats. Determination of fractional wordlengths requires minimization of hardware cost subject to accuracy constraint. In this context, we propose an analytical framework for deriving mean-square-error or quantization noise power among Lanczos vectors, which can serve as an accuracy constraint for wordlength optimization. Error is found to propagate through different arithmetic operations and finally accumulate in the last Lanczos vector. It is observed that variable and dynamic fixed-point formats produce vectors with lesser round-off error than constant format. All the three fixed-point formats of Lanczos algorithm have been synthesized on Virtex 7 field-programmable gate array using Vivado high-level synthesis design tool. A comparative study of resource usage and power consumption is carried out.

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“…Efficient implementation in hardware architectures like ASIC and FPGA requires minimization of silicon area, latency and power consumption. The optimization rule is given as follows:

min ((), C ((), w))

subject to

italicSQNR ((), w) \geq S Q N R_{m i n}

M S E ((), w) < M S E_{bound},

Section: Numerical Accuracy Evaluationmentioning

confidence: 99%

“…where C(w) is the implementation cost, w is the vector containing the WLs of all variables and MSE and SQNR are the error metrics with MSE bound and SQNR min as the maximum and minimum bounds [42]. A hardware cost estimation model is necessary for a fast optimization process.…”

Section: Numerical Accuracy Evaluationmentioning

confidence: 99%