An AppGallery for dataflow computing

Trifunović, Nemanja; Milutinović, Veljko; Korolija, Nenad; Gaydadjiev, Georgi

doi:10.1186/s40537-015-0038-8

Cited by 19 publications

(3 citation statements)

References 9 publications

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“…Others tried to provide automatic parallelization of control-flow algorithms onto the dataflow hardware [14,15]. Many researchers and programmers let others utilize their source code that is left on a common repository [16][17][18]. When dataflow hardware is separated from the control-flow hardware, the distance between them affects performance [19].…”

Section: Methodsmentioning

confidence: 99%

Merging control-flow and dataflow architectures on a single chip

Korolija,

Štrbac-Savić

2024

J Comp Foren Sci

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Computing power rises predominantly by increasing the number of cores in modern processors and the number of processors in cluster and cloud architectures. Along with increasing processing power, high-performance computing requirements also rise. The majority of the computing infrastructure includes control-flow processors that are based on the von Neumann paradigm. On the contrary, the principle of dataflow architectures is based on the data flowing through the already configured hardware. Recent research has proposed hybrid architectures, where both control-flow and dataflow hardware would exist on the same chip die. This article proposes a new hybrid control-flow and dataflow architecture where the control-flow hardware resembles modern graphical cards with thousands of cores and each GPU core has a reasonable amount of data-flow hardware. In this way, the advantages of dataflow architecture are exploited, including faster processing of high-performance computing algorithms and lower power consumption, while the conventional problem of communicating between control-flow and dataflow architectures is minimized. The proposed architecture is tested by analyzing the conjugate gradient method executed on both control-flow and dataflow hardware. The execution of the algorithm is divided onto GPU cores, and the execution of repeated instructions on each GPU core is delegated to the assigned dataflow hardware. The results indicate that it is possible to accelerate the execution of algorithms using the proposed architecture.

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Section: Methodsmentioning

confidence: 99%

Merging control-flow and dataflow architectures on a single chip

Korolija,

Štrbac-Savić

2024

J Comp Foren Sci

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“…With the above in mind, the future research would be to evaluate the hybrid algorithms for several methods of computing: During the comparison, we expect the DFE approach to be superior [18,29,35]. To further improve the performance, algorithmic changes would be introduced into the algorithm, as well as the architecture/compiler improvements into the implementation of the paradigm [47,48].…”

Section: Examples/tasks Related To Nbcementioning

confidence: 99%

Research in computing-intensive simulations for nature-oriented civil-engineering and related scientific fields, using machine learning and big data: an overview of open problems

Babović,

Bajat,

Đokić

et al. 2023

J Big Data

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This article presents a taxonomy and represents a repository of open problems in computing for numerically and logically intensive problems in a number of disciplines that have to synergize for the best performance of simulation-based feasibility studies on nature-oriented engineering in general and civil engineering in particular. Topics include but are not limited to: Nature-based construction, genomics supporting nature-based construction, earthquake engineering, and other types of geophysical disaster prevention activities, as well as the studies of processes and materials of interest for the above. In all these fields, problems are discussed that generate huge amounts of Big Data and are characterized with mathematically highly complex Iterative Algorithms. In the domain of applications, it has been stressed that problems could be made less computationally demanding if the number of computing iterations is made smaller (with the help of Artificial Intelligence or Conditional Algorithms), or if each computing iteration is made shorter in time (with the help of Data Filtration and Data Quantization). In the domain of computing, it has been stressed that computing could be made more powerful if the implementation technology is changed (Si, GaAs, etc.…), or if the computing paradigm is changed (Control Flow, Data Flow, etc.…).

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“…Programming dataflow architectures is considered to be reasonably harder compared to programming control-flow architectures [3]. Despite that, there are a lot of algorithms implemented for dataflow architectures [4], as well as methods to automate the translation of control-flow software into the dataflow [5,6]. Placing both controlflow and dataflow components with shared memory at the same chip die requires special techniques [7][8][9][10], while it reduces the lifespan of a chip to the minimum lifespan of its components [11].…”

Section: Advanced Technologies and Applications Session Invited Papermentioning

confidence: 99%

Scratchpad Memory Unit in Hybrid Control-flow and Dataflow Architectures

Korolija¹,

Štrbac-Savić²,

Đorđević³

2023

Proceedings of the International Scientific Conference - Sinteza 2023

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Dataflow architectures offer superior performance compared to control-flow architectures under certain conditions. This paper focuses on memory organization of a hybrid control-flow and dataflow architecture which guaranties that memory allocation can be accomplished in a predictable time. Mapping logical addresses into physical ones and accessing local memory in constant time is achieved using special address translation hardware. The memory organization is based on Buddy-system. It allows allocating arbitrary amounts of memory and prefetching data while it is being accessed by control-flow and dataflow hardware.

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An AppGallery for dataflow computing

Cited by 19 publications

References 9 publications

Merging control-flow and dataflow architectures on a single chip

Merging control-flow and dataflow architectures on a single chip

Research in computing-intensive simulations for nature-oriented civil-engineering and related scientific fields, using machine learning and big data: an overview of open problems

Scratchpad Memory Unit in Hybrid Control-flow and Dataflow Architectures

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