An Application of System Level Efficient ESD Design for HighSpeed USB3.x Interface

Wei, Pengyu; Maghlakelidze, Giorgi; Zhou, Jianchi; Gossner, Harald; Pommerenke, David

doi:10.23919/eos/esd.2018.8509765

Cited by 10 publications

(1 citation statement)

References 9 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…It is necessary to pass the component-level ESD test to ensure the reliability of the component after the chip is manufactured in the wafer foundry. Furthermore, the system is assembled into a product before delivery to the consumer [ 1 , 2 ] and must pass the system-level ESD test. The system-level ESD test standard, IEC 61000-4-2, includes the contact discharge mode and air discharge mode [ 3 ].…”

Section: Introductionmentioning

confidence: 99%

ESD Research of SCR Devices under Harsh Environments

Lin,

Lin

2023

Materials

View full text Add to dashboard Cite

In prior technology, system-level electrostatic discharge (ESD) tests under environment change conditions mainly focused on testing the effect of a high-temperature environment. i.e., the effect on internal circuits of heat generated outside. However, few studies have explored the effect of ambient relative humidity changes on integrated circuits (ICs). Therefore, this study will analyze the performance of various ESD protection components under high ambient temperature and high ambient relative humidity. The ESD protection devices are tested for the ESD robustness of the silicon-controlled rectifiers (SCR) under a harsh environment and the measurement results are discussed and verified in the CMOS process.

show abstract

Section: Introductionmentioning

confidence: 99%