An Approach to Mathematically Correlate Timing of Transaction Activity Between Pre-silicon and Post-silicon Environment

Abstract

Post-silicon validation is a major challenge due to finite controllability and observability of actual silicon and makes debug a complex task. The trace signals routed from CPUs and other sources are translated by sampling unit to time-stamped trace messages and stored in trace buffer. Time stamp generated is not the exact time at which event has occurred. Hence, trace data read from trace buffer in post-silicon environment is not accurate from debug perspective. This is corrected by finding the variable delay along with various paths observed between two viewpoints, one being the source at which the event occurs and the other being the destination where the event gets recorded. One method to achieve time accurate debug data is by correlating the time at which data transaction event occurs at the signal with the time at which the trace data for that particular transaction event gets time-stamped. The major advantage is the successful reconstruction of pre-silicon environment for that particular post-silicon environment and enabling data to be viewed on the fly.