An architectural level design methodology for smart camera applications

Abstract

Today's embedded computing applications are characterised by increased functionality, and hence increased design complexity and processing requirements. The resulting design spaces are vast and designers are typically able to evaluate only small subsets of solutions due to lack of efficient design tools. In this paper, we propose an architectural level design methodology that provides a means for a comprehensive design space exploration for smart camera applications and enable designers to select higher quality solutions and provides substantial savings on the overall cost of the system. We present efficient, accurate and intuitive models for performance estimation and validate them with experiments.

Design Methodology for Embedded Computer Vision Systems

“…Also, for each edge in that connects tasks that execute on different processors, an IPC edge is instantiated in from to to . The synchronization graph construction depends on the underlying target platform (e.g., shared memory [71] or domain specific [65]). Thus, the construction of such a graph is a general part of SPI methodology.…”