An area‐efficient memory‐based multiplier powering eight parallel multiplications for convolutional neural network processors

Abstract

Convolutional neural network (CNN) is widely used for various deep learning applications because of its best-in-class classification performance. However, CNN needs several multiply-accumulate (MAC) operations to realize human-level cognition capabilities. In this regard, an area-efficient multiplier is essential to integrate a large number of MAC units in a CNN processor. In this letter, we present an area-efficient memory-based multiplier targeting CNN processing. The proposed architecture adopts a 32-port memory shared across eight multiplications. Simulation results show that area is reduced by 18.4% compared with the state-of-the-art memory-based multiplier.