An Aspect-Oriented Approach to Hardware Fault Tolerance for Embedded Systems

Abstract

The steady reduction of transistor size has brought embedded solutions into everyday life. However, the same features of deep-submicron technologies that are increasing the application spectrum of these solutions are also negatively affecting their dependability. Current practices for the design and deployment of hardware fault tolerance and security strategies remain in practice specific (defined on a case-per-case basis) and mostly manual and error prone. Aspect orientation, which already promotes a clear separation between functional and non-functional (dependability and security) concerns in software designs, is also an approach with a big potential at the hardware level. This chapter addresses the challenging problems of engineering such strategies in a generic way via metaprogramming, and supporting their subsequent instantiation and deployment on specific hardware designs through open compilation. This shows that promoting a clear separation of concerns in hardware designs and producing a library of generic, but reusable, hardware fault and intrusion tolerance mechanisms is a feasible reality today.

Dependability-driven Strategies to Improve the Design and Verification of Safety-Critical HDL-based Embedded Systems

“…Existing approaches targeting the enhancement of robustness of HW implementations present two main limitations. First, those approaches acting at the design entry [140] [27] [4] (relying on high-level model of the system), do not, or only partially, consider the side effects of improving the dependability in the rest of PPA goals, which limits their usefulness in practice. Second, those approaches optimizing the synthesis [51], mapping [130], placement [33], and routing [73], are extremely difficult to apply, as they usually involve the modification of processes embedded within off-the-shelf tools that can be very rarely accessed.…”

“…Consider the RTL example provided in Fig. 6.9 in the expression IU/r.exec.res [4]. This expression represents the bit 4 of register r.exec.res of the Instruction Unit (IU ).…”