An eddy-current displacement-to-digital converter based on a ratio-metric delta-sigma ADC

Fekri, Ali; Nabavi, M.R.; Radeljic-Jakic, Nikola; Chang, Zu-yao; Pertijs, Michiel A. P.; Nihtianov, Stoyan

doi:10.1109/esscirc.2014.6942107

Cited by 12 publications

(15 citation statements)

References 6 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…This is at least 30 x better than [9]. Despite a higher f exc , better resolution and implementation in a sub-micron CMOS process, the interface dissipates similar power [4], [7]. Thermal drift is found to at least one order better than the previous state-of-the-art [4].…”

Section: Stability Characterizationmentioning

confidence: 79%

“…To attain sub-nm measurements, the temperature has to be controlled with an accuracy of 1 mK which is often not possible. A practical way to obviate this instability issue is to use a higher excitation frequency (f exc > 100 MHz) in the ECS interface [5]- [7]. However, it is not trivial to increase the excitation frequency in present ECS interfaces.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A 19.8-mW Eddy-Current Displacement Sensor Interface With Sub-Nanometer Resolution

Chaturvedi¹,

Vogel

Makinwa

et al. 2018

IEEE J. Solid-State Circuits

Self Cite

View full text Add to dashboard Cite

This paper presents an eddy-current sensor (ECS) interface intended for sub-nanometer displacement sensing in hitech applications. The interface employs a 126 MHz excitation frequency to mitigate the skin-effect, and achieve high resolution and stability. An efficient on-chip sensor-offset compensation scheme is introduced which removes sensor-offset proportional to the standoff distance. To assist in the ratiometric suppression of noise and drift of the excitation-oscillator, the ECS interface consists of a highly linear amplitude-demodulation scheme that employs passive capacitors for voltage-to-current conversion. Using a PCB-based pseudo-differential ECS, stability tests were performed which demonstrated a thermal drift of < 7.3 nm/ • C and long-term drift of only 29.5 nm over a period of 60 hours. The interface achieves an effective noise floor of 13.4 pm/ √ Hz which corresponds to a displacement resolution of 0.6 nm in a 2 kHz noise-bandwidth. The ECS interface is fabricated in TSMC 0.18 µm CMOS technology and dissipates only 19.8 mW from a 1.8 V supply.

show abstract

Section: Stability Characterizationmentioning

confidence: 79%

Section: Introductionmentioning

confidence: 99%

A 19.8-mW Eddy-Current Displacement Sensor Interface With Sub-Nanometer Resolution

Chaturvedi¹,

Vogel

Makinwa

et al. 2018

IEEE J. Solid-State Circuits

Self Cite

View full text Add to dashboard Cite

show abstract

“…R p is the parallel resistance of the tank defined by 2π L sen f sen Q, where Q is the quality factor of the tank. In prior art [5]- [8], sensor inductance changes were measured by sensing V sen. However, the various demodulation schemes required to do this consume extra power.…”

Section: B Sensor Excitation and Readoutmentioning

confidence: 99%

“…EC sensors with high resolution have been reported in the past [5]- [8]. These designs typically employ two coils, a sensing coil, and a matched reference coil, which are part of an LC oscillator.…”

mentioning

confidence: 99%

A 200-μW Interface for High-Resolution Eddy-Current Displacement Sensors

Pimenta

Gürleyük

Walsh

et al. 2021

IEEE J. Solid-State Circuits

View full text Add to dashboard Cite

This article presents a low-power eddy-current sensor interface for touch applications. It is based on a bang-bang digital phase-locked loop (DPLL) that converts the displacement of a metal target into digital information. The PLL consists of a digitally controlled oscillator (DCO) built around a sensing coil and a capacitive DAC, a comparator-based bang-bang phase/frequency detector (PFD), and a digital loop filter (DLF).The PLL locks the DCO to a reference frequency, making its digital input a direct representation of the sensing coil inductance. To compensate for the coil inductance tolerances, the DCO's center frequency can be trimmed by a second capacitive DAC. This approach obviates the need for a reference coil. When combined with a 5-mm-diameter sensing coil located 500 µm from a metal target, the interface achieves a displacement resolution of 6.7 nm (rms) in a 3-kHz bandwidth. It consumes 200 µW from a 1.8-V power supply, which represents the bestreported tradeoff between power consumption, bandwidth, and resolution.

show abstract

“…Various of sensor interfaces [1], [2] and instrumentation systems [3] require energy-efficient high-resolution analogto-digital conversion, and incremental -ADCs (IADC) have been widely utilized for such applications. For instance, displacement sensor applications require high-resolution ADCs with 16-bit or more resolution to provide high accuracy in measurements, and appropriate conversion speed is also needed to support fast moving objects [4], [5]. Recent sensor systems have been equipped with artificial intelligent algorithms to cope with various situations, which necessitates a kind of reconfigurable ADCs to provide some…”

Section: Introductionmentioning

confidence: 99%

A Triple-Mode Performance-Optimized Reconfigurable Incremental ADC for Smart Sensor Applications

Park

Kim

2019

IEEE Access

View full text Add to dashboard Cite

This paper proposes a triple-mode discrete-time incremental analog-to-digital converter (IADC) employing successive approximation register (SAR)-based zooming and extended counting (EC) schemes to achieve programmable trade-off capability of resolution and power consumption in various smart sensor applications. It mainly consists of an incremental delta-sigma modulator and the proposed SAR-EC sub-ADC for alternate operation of the coarse SAR conversion and EC. They can be reconfigured to operate separately depending on the application requirements. The SAR-based zooming structure allows the IADC to have better linearity and resolution, and additional activation of the EC function gives the further resolution. During this reconfigurable conversion process, pipelined reusing operation of sub-blocks reduces the silicon area and the number of cycles for target resolutions. A prototype ADC is fabricated in a 180-nm CMOS process, and its triple-mode operation of high-resolution, medium-resolution, and lowpower is experimentally verified to achieve 116.1-, 109.4-, and 73.3-dB dynamic ranges, consuming 1.60, 1.26, and 0.39 mW, respectively. INDEX TERMS Analog-to-digital converter (ADC), incremental ADC, triple-mode, SAR-based zooming, extended counting, pipeline operation.

show abstract

An eddy-current displacement-to-digital converter based on a ratio-metric delta-sigma ADC

Cited by 12 publications

References 6 publications

A 19.8-mW Eddy-Current Displacement Sensor Interface With Sub-Nanometer Resolution

A 19.8-mW Eddy-Current Displacement Sensor Interface With Sub-Nanometer Resolution

A 200-μW Interface for High-Resolution Eddy-Current Displacement Sensors

A Triple-Mode Performance-Optimized Reconfigurable Incremental ADC for Smart Sensor Applications

Contact Info

Product

Resources

About