An efficient and reliable MRF-based methodology for designing low-power VLSI circuits

Razavi, Sayed Mohammad; Razavi, Seyyed Mohammad

doi:10.1016/j.vlsi.2020.03.005

Cited by 4 publications

(2 citation statements)

References 18 publications

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“…In this paper, BER or bit error ratio (BER) has been used to evaluate the ability of cells to store data in the presence of noise parameters. The BER is inversely related to the peak SNR (PSNR) metric, which can be expressed as Equation (5) 21 :

BER goodbreak= \frac{No . of bits in correctly retrieved data}{Toltal No . of bits in orginal data}

…”

Section: Simulation Results Comparative Analysis and Supplementary Di...mentioning

confidence: 99%

“…This section provides a comprehensive assessment of the reliability and immunity against the noise of other bit-cells in the presence of power supply voltage conditions less than 50% of nominal voltage (i.e., 0.2 V) and ambient temperatures around 40 C (to ensure the ineffective of thermal noise on cell operation). 21 To evaluate the reliability and sensitivity of a memory structure against noise interference, the additive white Gaussian noise (AWGN) model with uniform distribution is used to generate noise signals. Figure 9 shows the signals of sensitive nodes in the proposed cell structure in the presence of noise along with the original BL signal in the range of 2 and 16 dB, which results confirm the SRAM cell tolerance of the noise problem.…”

Section: The Sensitivity and Reliability Evaluation In The Presence O...mentioning

confidence: 99%

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One‐sided 10T static‐random access memory cell for energy‐efficient and noise‐immune internet of things applications

Darabi

Salehi

Abiri

2022

Circuit Theory & Apps

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This paper presents a one‐sided 10‐transistors static‐random access memory (SRAM) cell appropriate for the internet of things (IoT) applications in which energy‐efficient SRAM cells are necessary to raise the battery lifetime. The bit‐cell core of the proposed SRAM cell is composed of two inverters with different structures based on the gate‐wrap‐around (GWA) carbon nanotube (CNT)‐gate‐diffusion input (GDI) technique and only one‐bit line to perform both read and write operations to minimize active power consumption. The proposed bit‐cell uses a transmission gate network and write‐assist schemes to significantly improve the write‐ability and stack read‐decoupling technique to enhance hold‐/read‐stability. Moreover, a memory mini‐array has been implemented using the proposed cell along with all the principal circuitries. Extensive Monte Carlo (MC) simulations show that write/hold/read static noise margins (SNMs) are improved by about 1.252, 1.196, and 1.152 times, respectively. Also, the results of evaluating the write‐ and read‐yield parameters for the proposed SRAM bit‐cell are about 22% and 13% better than counterpart bit‐cell designs, respectively. In addition, the bit error rate (BER) and energy dissipation parameters for the proposed memory cell are almost 61% and seven times higher than the studied SRAM bit‐cell in the same simulation process. Finally, to evaluate the effectiveness of the proposed SRAM bit‐cell in the real‐world application, a memory array architecture with an online (or off‐chip) adaptive power supply voltage based on a hardware algorithm for storing digital images at a minimum energy dissipation is proposed. Our simulation results emphasize that the proposed memory array can be a good candidate for energy‐efficient and noise‐immunity IoT platforms.

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BER goodbreak= \frac{No . of bits in correctly retrieved data}{Toltal No . of bits in orginal data}

…”

Section: Simulation Results Comparative Analysis and Supplementary Di...mentioning

confidence: 99%

Section: The Sensitivity and Reliability Evaluation In The Presence O...mentioning

confidence: 99%

One‐sided 10T static‐random access memory cell for energy‐efficient and noise‐immune internet of things applications

Darabi

Salehi

Abiri

2022

Circuit Theory & Apps

View full text Add to dashboard Cite

show abstract

Floorplanning for optimizing area using sequence pair and hybrid optimization

Tamarana,

Kumari

2023

Multimed Tools Appl

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Metamaterial and Helmholtz coupled resonator for high-density acoustic energy harvesting

Tan

Yan

et al. 2021

Nano Energy

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An efficient and reliable MRF-based methodology for designing low-power VLSI circuits

Cited by 4 publications

References 18 publications

One‐sided 10T static‐random access memory cell for energy‐efficient and noise‐immune internet of things applications

One‐sided 10T static‐random access memory cell for energy‐efficient and noise‐immune internet of things applications

Floorplanning for optimizing area using sequence pair and hybrid optimization

Metamaterial and Helmholtz coupled resonator for high-density acoustic energy harvesting

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