An Efficient and Scalable Semiconductor Architecture for Parallel Automata Processing

SUMMARYMotif searching, i.e., identifying meaningful patterns from biological data, has been studied extensively due to its importance in the biomedical sciences. In this work, we seek to improve the performance of Weeder, a widely-used tool for automatic de novo motif searching. Weeder consists of several functions, among which we find that the function oligo scan, which handles the pattern matching, is the bottleneck, especially when dealing with large datasets. Motivated by this observation, we adopt the Micron Automata Processor (AP) to accelerate the pattern-matching stage of Weeder. The AP is a massively-parallel, nonvon-Neumann semiconductor architecture that is purpose-built for symbolic pattern matching. Relying on the fact that AP is capable of performing matching for thousands of patterns in parallel, we develop an APaccelerated Weeder implementation in this work. In particular, we describe how to map Weeder's pattern matching to the AP chip and use the high-end FPGA on the AP board to postprocess the output from AP. Our experiment shows that the AP-accelerated Weeder achieves 751x speedup on pattern matching, compared to a single-threaded CPU implementation.

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“…Below we briefly introduce its main components and working principle. More details about the AP could be found in the work [5].…”

Section: Micron Automata Processormentioning

confidence: 99%

Accelerating Weeder: A DNA Motif Search Tool Using the Micron Automata Processor and FPGA

Wang

El-Hadedy

Skadron

et al. 2017

IEICE Trans. Inf. & Syst.

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“…In 2014, Micron Technologies unveiled a purpose-built automata accelerator appropriately named "The Automata Processor" [12], often referred to as the "AP". This product is designed in a 50nm DRAM process and computes one byte per cycle at a maximum frequency of 133 MHz for a throughput of 133 MBps (approximately 1 Gbps).…”

Section: The Micron Automata Processormentioning

confidence: 99%

“…The industry has realized the market potential for accelerating automata algorithms, and to this end, Micron has unveiled their Automata Processor [12], a course-grained spatial reconfigurable fabric tailored for automata workloads.…”

Section: Introductionmentioning

confidence: 99%

FPGA Automata Processing

Xie

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Dwindling inter-generational CPU performance and power consumption improvements previously made possible by semiconductor scaling motivate hardware specialization for a wide variety of tasks. In recent years, implementing certain algorithms as specialized circuits ("accelerators") has been proven to improve both speediness and power/energy efficiency compared to the equivalent CPU implementation. One particular domain that shows great promise for hardware specialization is automata processing. Finite automata are most commonly known as the back-end data structures for regular expressions, which are used in a wide variety of applications such as antivirus file scanning and packet payload inspection for network intrusion detection systems (NIDS). Several research efforts have extended the applicability of finite automata beyond just regular expression into domains such as machine learning, particle physics, bioinformatics, and pattern mining. The versatility of automata processing as well as its inefficiency on traditional von Neumann computer architectures informs the need for a flexible and high-performance accelerator for these applications.In this thesis, an FPGA-based automata processing hardware accelerator is implemented in two different configurations: (1) a traditional discrete FPGA accelerator board attached over PCI-Express; and (2) a new tightly-coupled cache-coherent FPGA accelerator architecture utilizing the Intel Broadwell Xeon CPU + Arria 10 FPGA platform, known as the Hardware Accelerator Research Platform ("HARP").i

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“…All active STEs receive a new input symbol on every clock cycle. This means that thousands of state machines can be executed in parallel [3]. …”

Section: Automata Processormentioning

confidence: 99%

“…The Automata Processor (AP) is a scalable hardware accelerator that can perform highly complex pattern matching applications [3]. It executes parallel processing of thousands of non-deterministic finite automata state machines that represent different regular expression patterns.…”

Section: Introductionmentioning

confidence: 99%

IP on AP: Exploring Image Processing on the Automata Processor

Ly¹

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The Automata Processor is a novel hardware accelerator that can perform pattern matching in parallel. To date, this pattern matching has been limited to one-dimensional problems that can be implemented as flexible string-matching methods such as those found in genomics. In this thesis, we present a novel process of implementing image retrieval using a multinary representation for deployment on an automata framework. Images are encoded into discriminative and unique regular expression descriptors in such a way that can be used for classification purposes. The regular expression descriptors are streamed through sets of non-deterministic finite automata (NFA).To improve performance of this multi-dimensional classification problem, we transform discriminative feature descriptors using a cumulative distribution transform. The transformed features are encoded into regular expressions which can be executed on the automata processor.The thesis also highlights methods of evaluating the similarity between images using these regular expressions in the automata processor. Our image retrieval and classification method improves on classification accuracy and achieves a run-time of less than one one-hundredth of a second per image which represents a three-fold improvement over competing architectures.i ACKNOWLEDGEMENTS

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An Efficient and Scalable Semiconductor Architecture for Parallel Automata Processing

Cited by 197 publications

References 24 publications

Accelerating Weeder: A DNA Motif Search Tool Using the Micron Automata Processor and FPGA

Accelerating Weeder: A DNA Motif Search Tool Using the Micron Automata Processor and FPGA

FPGA Automata Processing

IP on AP: Exploring Image Processing on the Automata Processor

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