Abstract:Multipliers are the most demanding component of any filter. They not only dominate most of the chip area but also contribute to most of the computational delay. An efficient realization of filter thus requires optimization of the multipliers. In this paper, a high performance block reconfigurable finite impulse response filter structure is presented. Block-based realization improves the overall throughput of the structure. A novel partial-product-based structure is proposed for Multiply and Accumulation operat… Show more
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