An Efficient Design for Testability Approach of Reversible Logic Circuits

Abstract

Reversible circuits have been extensively investigated because of their applications in areas of quantum computing or low-power design. A reversible circuit is composed of only reversible gates and allow computations from primary inputs to primary outputs and vice-versa. In the last decades, synthesis of reversible circuits received significant interest. Additionally, testing of these kinds of circuits has been studied which included different fault models and test approaches dedicated for reversible circuits only. The analysis of testability issues in a reversible circuit commonly involves the detection of the missing gate faults that may occur during the physical realizations of the reversible gates. In this paper, we propose a design for testability (DFT) technique for reversible circuits in which the gates of a circuit are clustered into different sets and the gates from each cluster are then connected to an additional input line where, the additional line acts as an extra control input to the corresponding gate. Such arrangement makes it possible to achieve [Formula: see text] fault detection in any reversible circuit with a small increase in quantum cost. Experimental evaluations confirm that the proposed DFT technique incurs less quantum cost overhead with [Formula: see text] fault detection compared to existing DFT techniques for reversible circuits.

Design‐for‐testability for reversible logic circuits based on bit‐swapping

“…Several researchers [9–36] have studied the problem of fault modelling and testing of reversible logic circuits. While the stuck‐at fault model is widely used for conventional logic circuits, newer models such as single missing‐gate fault (SMGF), repeated‐gate fault (RGF), partial missing‐gate fault (PMGF) or multiple missing gate fault (MMGF), have been found to be more suitable for representing physical failures or defects in reversible circuits implemented with different quantum technologies [9, 15, 16].…”

A new online testing technique for reversible circuits

“…We follow the fault models as described in the literature as fruitful to capture physical defects in quantum reversible circuits [4, 9, 11, 13]. Based on these models, several test strategies are described in the existing literature [13–34]. However, with changing technology, these fault models are likely to be changed.…”