An Efficient DSP-FPGA-Based Real-Time Implementation Method of SVM Algorithms for an Indirect Matrix Converter

Abstract

This paper proposes a real-time DSP-and FPGAbased implementation method of a space vector modulation (SVM) algorithm for an indirect matrix converter (IMC). Therefore, low-cost and compact control platform is built using a 32-bit fixed-point DSP (TMS320F2812) operating at 150 MHz and a SPARTAN 3E FPGA operating at 50 MHz. The method consists in using the event-manager modules of the DSP to build specified pulses at its PWM output peripherals, which are fed to the digital input ports of a FPGA. Moreover, a simple logical processing and delay times are thereafter implemented in the FPGA so as to synthesize the suitable gate pulse patterns for the semiconductorcontrolled devices. It is shown that the proposed implementation method enables high switching frequency operation with high pulse resolution as well as a negligible propagation time for the generation of the gating pulses. Experimental results from an IMC prototype confirm the practical feasibility of the proposed technique.

A Hybrid Modulation Scheme for Dual-Output Five-Leg Indirect Matrix Converter

“…3 shows that two values of the virtual dc-link voltage are provided over a switching period. Indeed, the voltage V dc is equal to E ab during the application of the first switching state [1][2][3][4][5][6][7][8][9][10]. It becomes equal to -E ca during the application of the second switching state .…”

“…ATRIX converters are ac/ac power conversion type of topologies that can provide sinusoidal input/output waveforms, unity input power factor operation, and bidirectional power flow [1] [2]. Their more important benefit over traditional ac/dc/ac power conversion topologies is the absence of electrolytic dc-bus bulky capacitors [3] [4].…”

A Carrier-Based Pulse Width Modulation Method for Indirect Matrix Converters

“…According to the principle of selecting the zero vectors in the inverter stage, the switching pattern is arranged as shown in Fig. 4, when both the rectifier and inverter stage are operated in sector 1 [18]- [20]. It can be seen that the state transitions of the active switches (S bn , S cn ) in rectifier stage occur during the time where the zero vectors are applied in the inverter stage.…”

“…When compared to the conventional SVPWM, which takes a long time to determine the duty cycle of the effective vectors and to make the switching pattern according to the position of the reference output voltage vector and the reference input current vector, the proposed method demands less computational complexity for DSP. Nevertheless, the proposed carrier-based PWM method does not provide the CMV reduction when compared to the reduced CMV-PWM method introduced in [21] because it is based on the conventional SVPWM method, which is presented in [18]- [20]. This paper is organized as follows.…”

DC components and subharmonics generated by naturally sampled PWM techniques

“…Generally the NS-PWM techniques in the past was im plemented by using analog devices [2], nowadays up-to date digital devices are used making possible the accurate imple mentation of the NS-PWM [4], [3], [8], [9], [10], [11]. In most cases the reference signals are multisampled during a carrier signal period by utilizing the parallel computing properties of the FPGA [4], [3], [12] In this section a practical implementation method is pre sented which is capable to realize accurately all NS-PWM techniques.…”