Proceedings of the 41st Annual Design Automation Conference 2004
DOI: 10.1145/996566.996628
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An efficient finite-domain constraint solver for circuits

Abstract: This paper presents a novel hybrid finite-domain constraint solving engine for RTL circuits. We describe how DPLL search is modified for search in combined integer and Boolean domains by using efficient finite-domain constraint propagation. This enables efficient combination of Boolean SAT and linear integer arithmetic solving techniques. We automatically use control and data-path abstraction in RTL descriptions. We use conflict-based learning using the variables on the boundary of control and data-path for ad… Show more

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Cited by 32 publications
(51 citation statements)
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“…Many of the verification problems arising in such domains can be naturally modeled as satisfiability in Linear Arithmetic Logic (LAL), i.e., the boolean combination of propositional variables and linear constraints over numerical variables. For its practical relevance, LAL has been devoted a lot of interest, and several decision procedures exist that are able to deal with it (e.g., SVC [17], ICS [24,19], CVCLITE [17,10], UCLID [36,33], HDPLL [30]). …”
Section: Motivations and Goalsmentioning
confidence: 99%
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“…Many of the verification problems arising in such domains can be naturally modeled as satisfiability in Linear Arithmetic Logic (LAL), i.e., the boolean combination of propositional variables and linear constraints over numerical variables. For its practical relevance, LAL has been devoted a lot of interest, and several decision procedures exist that are able to deal with it (e.g., SVC [17], ICS [24,19], CVCLITE [17,10], UCLID [36,33], HDPLL [30]). …”
Section: Motivations and Goalsmentioning
confidence: 99%
“…The second set of experiments was performed on a benchmark suite (called RTLC hereafter) formalizing safety properties for RTL circuits, provided to us by the authors of [30] (see [30] for a more detailed description of the benchmarks).…”
Section: Description Of the Test Casesmentioning
confidence: 99%
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“…Each satisfiable assignment for the Boolean SAT problem has to be validated on the concrete problem using the theory solver. The solver proposed in [17] can be seen as a specialized SMT solver for bit vector logic. Tightly coupling the different solvers, especially to enforce learning due to conflicts resulting from partial assignments and to efficiently carry out implications, is a challenge in this area.…”
Section: Introductionmentioning
confidence: 99%
“…However, [32] only aims at the data-paths, and thus, does not allow a Boolean part within the original formula. This is mended by [33] using a lazy encoding with a modified DPLL search.…”
Section: Introductionmentioning
confidence: 99%