An efficient, global resource-directed approach to exploiting instruction-level parallelism

Abstract

Many techniques have been proposed for exploiting instruction level parallelism, ranging from the optimal and expensive but ignoring resource constraints, to various forms of introducing resource constraints. One of the most aggressive of these techniques is ResourceConstrained Software Pipelining (RCSP) [ 11. RCSP works by repeatedly scheduling successive iterations of a loop in parallel until the data and resource dependence structure of the loop causes the process to converge on a repeating scheduling pattern. This repeating pattern is then used as the new loop body. In principle, this process can be made optimal with respect to full unrolling and scheduling of the loop. Of course, this is not the same as absolute optimality; however, given the NP-hard nature of the problem and the results of Ell], this may be the strongest form possible for general loop pipelining. The main drawback of RCSP is that, in practice, its space/time overhead can be fairly expensive.In this paper, we present Resource-Directed Loop Pipelining (RDLP), a new approach that attempts t o retain much of the advantages of RCSP while minimizing the expense. It does so by allowing the availability of target resources to in some sense guide the application of parallelism exposing and parallelizing transformations. One of the key features of RDLP is the separation of control heuristics from transformations that allows the loop pipelining to be as general as the underlying system of code motion transformations. Results are presented that show that even with very unsophisticated heuristics, RDLP achieves roughly the same performance as RCSP, while providing a 4-fold decrease in space/time cost.

Coordinated parallelizing compiler optimizations and high-level synthesis

“…However, we have found HTGs to be the most natural choice for our parallelizing transformations. Also, our scheduler relies heavily on compiler transformations such as Trailblazing [47] and Resource-Directed Loop Pipelining [54] that were originally developed using HTGs as the underlying intermediate representation.…”

Using Global Code Motions to Improve the Quality of Results for High-Level Synthesis

“…We implemented the code-motion transformations, the scheduling heuristic, and control and binding passes in a modular and extensible high-level synthesis framework called Spark [10]. We also modified several parallelizing compiler transformations [11], [12] for high-level synthesis and implemented them within our framework. Spark produces synthesizable RTL VHDL and, thus, enables evaluation of the effects of several coarse and fine-grain optimizations on logic synthesis results.…”

Loop shifting and compaction for the high-level synthesis of designs with complex control flow

“…Loop unrolling and loop pipelining (or software pipelining) have been shown to be effective techniques for exploiting parallelism across loop iterations in the parallelizing compiler community [7,8,9,10,15,16]. Modulo scheduling and its variants [7,9] create a schedule of one iteration of the loop body such that repetition of this iteration after a regular initiation period does not violate any resource constraints and inter-and intra-iteration dependencies.…”

“…A new pipelined loop body is then created using this repeating pattern. Loop shifting was first proposed as a part of the resource-directed loop pipelining (RDLP) technique [10]. RDLP first unrolls the loop several times and then attempts loop shifting and compaction.…”

“…Loop transformations that unroll and pipeline loops have long been recognized in the software community as key to exploiting much larger amounts of parallelism in program codes than is possible by looking at just a single iteration of the loop body [7,8,9,10]. In contrast, the use of loop transformations for high-level synthesis have been few and the work has focused mostly on data flow graphs [11,12,13,14].…”