An Efficient Monarchic Reconfiguration Protocol with Deadlock Freedom on Interconnection Networks

Abstract

Monarchic Reconfiguration protocol (MRP) is the selfgoverning, independent and autonomous system to resolve the deadlocking problem during reconfiguration in interconnection networks. Deadlock is the cyclic dependency between the old and new routing functions. Our aim is to protect the routing path with deadlocking freedom and improve the performance drastically. Our proposed method will increase the availability and dependability of the network and reduce 100 % pocket drops ratio with deadlock freedom. INTERCONNECTION NETWORKSHigh-performance interconnection networks comprise the communication backbone in digital systems at several system levels. At the higher system levels, local-area networks (LANs) are used in clusters of PCs, networks of workstations and other distributed processing systems which serve as cost/performance effective alternatives to tightly-coupled massively parallel processing systems. System-area networks (SANs) are used for interconnecting processors, memories, and I/O devices in systems with the primary goal of increasing reliability in the presence of link/router failures. Storage-area networks (STANs)[1]are used to increase performance and reliability of large disk arrays by offering access to stored data by processors through multiple paths, thus providing continued service in the presence of processor failure. Internet protocol router fabric (IPRF) networks are used within IP routers to handle IP traffic at high (multi gigabit) sustained line rates. Server I/O(SIO) and inter processor communication (IPC) [2,3] networks are used to overcome many of the scalability limitations of multi chip bus-based systems, allowing high-speed interconnections between memory controllers and I/O devices, direct access to disk from LAN adapters, and concurrent communication between processors, memories and I/O devices in multiprocessors. Likewise, at lower levels, networks-on-chip (NOCs) [4,5,6]are used to overcome many of the performance limitations of bus-based systems at the chip level. Parallel computing and communication systems built from the above networks require high-performance communication services [7] with high reliability, availability and dependability -collectively, high robustness. The performance [8] of the interconnection network is measured, in part, by packet delivery time[9] from source to destination (i.e., latency) and by the number of packets delivered per unit time (i.e., throughput). In essence, a high-performance network allows the maximum number of packets to make forward progress to their destinations in minimal time, preferably along shortest paths [10] to preserve network bandwidth. Likewise, the reliability, availability and dependability of a network equally impact the overall goodness (quality of a system). These attributes are measured, in part, by the network's ability to remain up and running at near normal levels even when events occur which change its configuration, possibly due to changes in users' needs and/or system state. Such reconfiguration events ma...