An efficient on-line task allocation algorithm for QoS and energy efficiency in multicore multimedia platforms

Abstract

The impact of variability on sub-45nm CMOS multimedia platforms makes hard to provide application QoS guarantees, as the speed variations across the cores may cause sub-optimal and sample-dependent utilization of the available resources and energy budget. These effects can be compensated by an efficient allocation of the workload at run-time. In the context of multimedia applications, a critical objective is to compensate core speed variability while matching time constraints without impacting the energy consumption.In this paper we present a new approach to compute optimal task allocations at run-time. The proposed strategy exploits an efficient and scalable implementation to find on-line the best possible solution in a tightly bounded time. Experimental results demonstrate the effectiveness of compensation both in terms of deadline miss rate and energy savings. Results have been compared with those obtained applying state-of-art techniques on a multithreaded MPEG2 decoder. The validation has been performed on a cycle-accurate virtual prototype of a nextgeneration industrial multicore platform that has been extended with process variability models.

Power versus quality trade-offs for adaptive real-time applications

“…A run-time linear programming technique is used to find optimal task mappings on an MPSoC, considering core performance variations due to production process variability. As opposed to this paper, the technique presented in [21] does not consider quality scaling of adaptive applications, in order to achieve an energy/power reduction.…”

“…In [21], a run-time technique is proposed that trades application-level quality-of-service for power reduction, on multi-core multimedia platforms. They present their technique for an MPEG2 decoder, using deadline miss rates as their quality metric.…”

High level thermal-aware scheduling for multiprocessors

“…At the higher levels (e.g. the algorithmic and system level), compiler optimization techniques [22] and scheduling [21] [69] [72] [81] [82] [88] [89] can help to alleviate the power/thermal issues in a high-level (abstracted) way. In fact, according to the ITRS 1 We use the term multiprocessor in our research to refer to multiple processors, integrated onto a single silicon die and tightly coupled to each other.…”