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Arithmetic computations are performed in pipeline and as parallel as possible.
The algorithm is implemented fully in parallel for each color component.
We have used a hardware divider that performs the division operation for the normalization task in a single clock cycle.
Arithmetic computations are performed in pipeline and as parallel as possible.
The algorithm is implemented fully in parallel for each color component.
We have used a hardware divider that performs the division operation for the normalization task in a single clock cycle.