An efficient pre-assignment routing algorithm for flip-chip designs

IPSJ Transactions on System LSI Design Methodology

Wong

2012

Abstract:The increasing complexity of electronic systems has made PCB routing a difficult problem. A large amount of research effort has been dedicated to the study of this problem. In this paper, we provide an overview of recent research results on the PCB routing problem. We focus on the escape routing problem and the length-matching routing problem, which are the two most important problems in PCB routing. Other relevant works are also briefly introduced.

Section: Ordered Escapementioning

confidence: 99%

Advances in PCB Routing

IPSJ Transactions on System LSI Design Methodology

Wong

2012

“…They also proposed an routing algorithm based on the discovered necessary and sufficient conditions. The work by Lee et al [22] does not put monotonic constraint on the routing. Their routing algorithm is based on computing the weighted longest common subsequence and maximum planar subset of chords.…”

Section: B Ordered Escapementioning

confidence: 99%

Recent research development in PCB layout

2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

Wong

2010

The increasing complexity of electronic systems has made PCB layout a difficult problem. A large amount of research efforts are dedicated to the study of this problem. In this paper, we provide an overview of recent research results on the PCB layout problem. We focus on the escape routing problem and the length-matching routing problem, which are the two most important problems in PCB layout. Other relevant works are also briefly introduced.

“…Recently, based on the re-numbering technique of IO connections and the routable separation of four sectors in a flip-chip design, Yan et al [4] also proposed an efficient routing approach to route all the IO connections in the pre-assignment problem. Fang et al [5] also proposed an effective global router to improve the performance of their proposed ILP-based flip-chip global router. However, due to the infeasible pre-assignment of IO connections in a flip-chip design, these proposed RDL routers cannot guarantee 100% routability for the preassigned IO connections.…”

Section: Introductionmentioning

confidence: 99%

Routability-driven RDL routing with pin reassignment

23rd IEEE International SOC Conference

Chen

2010

Due to the infeasible pre-assignment of IO connections in a flip-chip design, all the published RDL routers cannot guarantee 100% routability for the pre-assigned IO connections. In this paper, based on two swapping processes for pin reassignment, the unroutable conditions in a flip-chip design can be eliminated. Furthermore, by using the assignment of routability-driven transfer and boundary pins, a given set of pre-assigned IO connections between the wire-bonding pads and the bump balls can be completely routed to minimize the total wirelength with 100% routability in a flip-chip design. I. INTRODUCTIONAs the circuit complexity increases and the feature size decreases, it is important for VLSI designs to satisfy the requirement of more IO pads. Recently, an advanced packaging technology, flip-chip(FC) package [1], is introduced to meet the higher integration density and the larger IO count in modern VLSI circuits. Generally speaking, flip-chip design describes the methodology of electrically connecting the die core to the package carrier. Because of the reduced signal inductance and the reduced package footprint, the flip-chip technology has extensively been used in high-performance designs. However, the placement of IO pads in IC designs is not well mapped onto bump balls in a flip-chip design. Hence, an extra metal layer, redistribution layer(RDL), is used to redistribute the IO pads to the bump balls without changing the placement of the IO pads.In a flip-chip design, the routing problem can be classified into two categories: the free-assignment routing problem and the pre-assignment routing problem. In the free-assignment problem, any IO pad is not assigned to any bump ball before routing. Therefore, the RDL router has the freedom to assign the IO pads to the bump balls during routing. Since the connections between the IO pads and the bump balls are defined by the RDL router, this routing problem is relatively easier if the routable assignment of IO connection is obtained. Therefore, the free-assignment problem will focus on the assignment problem for IO connections between IO pads and bump balls. In the pre-assignment problem, the IO connections between IO pads and bump balls have been assigned before routing. Therefore, the solution in the preassignment problem depends on the given assignment of IO connections. Since the pre-assignment result for IO connections has more routing constraints, the constrained