An End-to-End Convolutional Neural Network for Automated Failure Localisation and Characterisation of 3D Interconnects

Abstract

The advancement in the field of 3D integration circuit technology leads to new challenges for quality assessment of interconnects such as through silicon vias (TSVs) in terms of automated and time-efficient analysis. In this paper, we develop a fully automated high-efficient End-to-End Convolutional Neural Network (CNN) model, utilizing two sequentially linked CNN architectures, suitable to classify and locate thousands of TSVs as well as provide statistical information. In particular, we generate interference patterns of the TSVs conducting a unique concept of Scanning Acoustic Microscopy (SAM) imaging. Scanning Electron Microscopy (SEM) is used to validate and also disclose the characteristic pattern in the SAM C-scan images. By comparing the model with semi-automated machine learning approaches its outstanding performance is illustrated, indicating a localisation and classification accuracy of 100% and over 98%, respectively. The approach is not limited to SAM-image data and presents an important step towards zero failure management.

Fast In-Line Failure Analysis of Sub-micron-sized Cracks in 3D Interconnect Technologies Utilizing Acoustic Interferometry

“…By employing the concept of interferometry, we generate distinct characteristic interference patterns within the C-scan image data. The differentiation of the generated patterns allows the application of automated TSV classi cation and localization routines based on machine learning 17 .…”

“…ML-based failure localization and classi cation. We used two CNN models arranged in an E2E fashion to classify the test array 17 . The rst CNN is dedicated for localizing all the TSVs from the SAM C-scan image.…”

“…Therefore, the setup is highly suited for the inline inspection of TSVs within an industrial environment. We utilize the convolutional neural network methodology developed in 17 for the automated and time-e cient localization and classi cation of the TSVs on wafer level. Figure 2b depicts an exemplary region of interest (ROI) and illustrates the automated classi cation and localization of the TSV array.…”

“…The emerging residual stress may cause critical damage formation such as delamination and/or cracks in the sidewall or bottom of the TSV. Therefore, defect detection on mm-level and below in TSVs is crucial to ensure the quality fabrication of interconnects in the production 17 . However, failure analysis of TSVs within an industrial environment inline poses a tremendous challenge.…”

“…We conduct, accompanied to the experimental results, wave propagation simulations based on elastodynamic nite integration technique (EFIT) to gain an in-depth understanding of the propagation and interaction of excited SAWs within the TSV. The detected different SAM interference patterns can be associated in an automated manner to either non-defective or various defective TSV classes, by utilizing an end-to-end convolutional neural network 17 . The presented methodology shows that the controlled excitation of surface acoustic waves facilitates the detection of nm-sized cracks, an essential accomplishment for modern failure analysis in 3D integration technologies.…”