An energy-efficient random number generator for stochastic circuits

Kim, Kyounghoon; Lee, Jong-Eun; Choi, Ki‐Young

doi:10.1109/aspdac.2016.7428020

Cited by 47 publications

(18 citation statements)

References 15 publications

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“…The second reason is that the correlations between different bitstreams usually degrade the computation accuracy since these bitstreams are usually obtained by pseudo random number generators. Aiming to improve the quality of SBGs, many pioneer researchers have proposed several SBG models such as linear feedback shift registers (LFSRs) [25]- [27], weighted binary SNG [28]. However, such CMOS based approaches usually pose some bottlenecks on power consumption and chip area efficiency.…”

Section: A Stochastic Computingmentioning

confidence: 99%

SPINBIS: Spintronics-Based Bayesian Inference System With Stochastic Computing

Jia

Yang

Dai

et al. 2020

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Bayesian inference is an effective approach for solving statistical learning problems, especially with uncertainty and incompleteness. However, Bayesian inference is a computingintensive task whose efficiency is physically limited by the bottlenecks of conventional computing platforms. In this work, a spintronics based stochastic computing approach is proposed for efficient Bayesian inference. The inherent stochastic switching behaviors of spintronic devices are exploited to build stochastic bitstream generator (SBG) for stochastic computing with hybrid CMOS/MTJ circuits design. Aiming to improve the inference efficiency, an SBG sharing strategy is leveraged to reduce the required SBG array scale by integrating a switch network between SBG array and stochastic computing logic. A deviceto-architecture level framework is proposed to evaluate the performance of spintronics based Bayesian inference system (SPINBIS). Experimental results on data fusion applications have shown that SPINBIS could improve the energy efficiency about 12× than MTJ-based approach with 45% design area overhead and about 26× than FPGA-based approach.

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Section: A Stochastic Computingmentioning

confidence: 99%

SPINBIS: Spintronics-Based Bayesian Inference System With Stochastic Computing

Jia

Yang

Dai

et al. 2020

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

View full text Add to dashboard Cite

show abstract

“…We note that several proposals address the cost of LFSR-based pseudorandom number generator by extracting combinatorial subsets of the bits in a large LFSR [49,50]. Though these shared-LFSR methods amortize the energy cost by sharing it over many pseudorandom bits, the resulting correlation between these bitstreams is 1.5 to 2 times higher than the isolated LFSR case [50]. In correlation-sensitive applications, this is clearly disadvantageous.…”

Section: Smtj Programmable Bitstream Generatormentioning

confidence: 99%

“…[62,65]. These works draw heavily on new ideas in the stochastic computing literature, including massively parallel generation of pseudorandom bitstreams [66], state-machine based nonlinear activation functions [63,67], and aggressive use of correlation insensitivity [68].…”

Section: Application To Neural Networkmentioning

confidence: 99%

Energy-Efficient Stochastic Computing with Superparamagnetic Tunnel Junctions

et al. 2020

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Superparamagnetic tunnel junctions have emerged as a competitive, realistic nanotechnology to support novel forms of stochastic computation in CMOS-compatible platforms. One of their applications is to generate random bitstreams suitable for use in stochastic computing implementations. We describe a method for digitally programmable bitstream generation based on pre-charge sense amplifiers which is more energy efficient than previously explored alternatives. The energy savings offered by this digital generator survive when we use them as the fundamental units of a neural network architecture. To take advantage of the potential savings, we codesign the algorithm with the circuit, rather than directly transcribing a classical neural network into hardware. The flexibility of the neural network mathematics compensates for explicitly energy efficient choices we make at the device level. The result is a convolutional neural network design operating at ≈ 150 nJ per inference with 97 % performance on MNIST-nearly an order of magnitude more energy efficiency than comparable proposals in the recent literature. * matthew.daniels@nist.gov † mark.stiles@nist.govThe low energy, truly random behavior, ease of control, and established compatibility with complementarymetal-oxide-semiconductor (CMOS) circuitry has led to the use of SMTJs as the basis for a number of novel computing schemes [11][12][13]. SMTJs were proposed to implement the concept of probabilistic bits, or "p-bits," which were leveraged for applications as Bayesian neural networks [14][15][16], invertible Boolean logic [17,18], reservoir computing [19], and Ising network models applied to optimization problems [20,21]. SMTJs were also proposed as stochastic neural units [22] that can interact with synaptic units, emulated by crossbar arrays of mag-

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“…Thus, another highly effective approach with traditional stochastic bitstream is APC. Other than the frontend binary to stochastic conversion stage of SNGs, the final stochastic to binary conversion stage is also equally important (Kim, Lee & Choi, 2016a;Kim, Lee & Choi, 2016b).…”

Section: Extended Stochastic Logic (Esl): Another Radical Approachmentioning

confidence: 99%

Figure 11: Other SC activation functions.

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An energy-efficient random number generator for stochastic circuits

Cited by 47 publications

References 15 publications

SPINBIS: Spintronics-Based Bayesian Inference System With Stochastic Computing

SPINBIS: Spintronics-Based Bayesian Inference System With Stochastic Computing

Energy-Efficient Stochastic Computing with Superparamagnetic Tunnel Junctions

Figure 11: Other SC activation functions.

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