An Energy Efficient VLSI Architecture of Decision Feedback Equalizer for 5G Communication System

Khan, Mohd Tasleem; Ahamed, Shaik Rafi

doi:10.1109/jetcas.2017.2741499

Cited by 10 publications

(1 citation statement)

References 27 publications

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“…In [1], techniques such as unfolding and retiming is used to enhance the throughput. For 16-QAM, the suggested design delivers a throughput of almost 2.15 Gb/s.…”

Section: Throughput = Clock Rate Processing Time Per Samplementioning

confidence: 99%

Enhancing Techniques for Adaptable Decision Feedback Balancer for 5G Communication

2024

IJRASET

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This complete review examines two basic parts of cutting edge correspondence frameworks. First and foremost, it investigates novel plan procedures and models for Adaptable Decision Feedback Balancer (ADFB) in rapid correspondence frameworks. Strategies like look-into tables, disseminated math, and prescient equal branch slicers are utilized to upgrade union rates, throughput, and mistake execution while limiting equipment intricacy. The proposed plans exhibit significant advancement in region, power proficiency, and rationale usage across different regulation plans, channel models, and portability situations. Furthermore, the examination digs into Super Dependable Low Idleness Correspondence (SDLIC) headways inside the 5G New Radio (NR) downlink, tending to actual layer difficulties determined in 3GPP Delivery 15. The review presents a clever correspondence framework utilizing super codes to moderate between image impedance in remote conditions. Also, inventive equal plans for high velocity Choice Input Adjusters (CIAs) and equipment proficient models for versatile balancers utilizing disseminated number-crunching are introduced. The joined discoveries contribute significant bits of knowledge into streamlining versatile balancers for group of people yet to come correspondence frameworks and progressing SDLIC in 5G NR.

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“…In [1], techniques such as unfolding and retiming is used to enhance the throughput. For 16-QAM, the suggested design delivers a throughput of almost 2.15 Gb/s.…”

Section: Throughput = Clock Rate Processing Time Per Samplementioning

confidence: 99%