An error-tolerant serial binary full-adder via a spiking neural P system using HP/LP basic neurons

Ochirbat, Otgonnaran; Ishdorj, Tseren-Onolt; Cichon, Gordon

doi:10.1007/s41965-020-00033-3

Cited by 17 publications

(3 citation statements)

References 9 publications

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“…While this work is a preliminary one to introduce the visual tool Snapse for SN P systems, the Snapse version as of now can be used, at least in part, in some applications. Aside from the examples in Section 5 and their extensions or generalization, Snapse could be used in (parts of) the systems for skeletonizing images as in [27,28], aiding in the design of some systems in [30,[32][33][34], computational biology in [37], and other applications in [26,38].…”

Section: Final Remarksmentioning

confidence: 99%

“…Much theoretical work has been done on SN P systems, e.g., their normal forms [14][15][16], formal representations [17][18][19], and their relations to classical models of computation [20][21][22][23][24][25] with a short and recent survey in [26]. After much theoretical work, more recently the work to apply SN P systems to real-world problems becomes even more active, with some early works on image processing e.g., [27] and more recently in [28], use for cryptography [29][30][31], use of evolutionary algorithms to design SN P systems [32][33][34], in pattern recognition [35,36], computational biology [37], with a recent survey in [38].…”

Section: Introductionmentioning

confidence: 99%

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Snapse: A Visual Tool for Spiking Neural P Systems

et al. 2020

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Spiking neural P (SN P) systems are models of computation inspired by spiking neurons and part of the third generation of neuron models. SN P systems are equivalent to Turing machines and are able to solve computationally hard problems using a space-time trade-off. Research in SN P systems theory is especially active, more so in recent years as more efforts are directed towards their real-world applications. Usually, SN P systems are represented visually as a directed graph and simulated through mainly text-based simulations or tables. Thus, there is a need for tools that can simulate and create SN P Systems in a visual and easy-to-use manner. Snapse is such a tool which aims to hasten the speed and ease at which researchers may create and experiment with SN P systems. Furthermore, visual tools such as Snapse can help further bring SN P systems outside of theoretical computer science.

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Section: Final Remarksmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Snapse: A Visual Tool for Spiking Neural P Systems

et al. 2020

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“…This have been harnessed already by introducing CuSNP, a set of simulators for SNP systems implemented with CUDA [21][22][23][24]. Simulators for specific solutions have been also defined in the literature [5,25]. Moreover, this is not unique for SNP systems, many simulators for other P system variants have been accelerated on GPUs [26][27][28].…”

Section: Introductionmentioning

confidence: 99%

Simulation of Spiking Neural P Systems with Sparse Matrix-Vector Operations

et al. 2021

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To date, parallel simulation algorithms for spiking neural P (SNP) systems are based on a matrix representation. This way, the simulation is implemented with linear algebra operations, which can be easily parallelized on high performance computing platforms such as GPUs. Although it has been convenient for the first generation of GPU-based simulators, such as CuSNP, there are some bottlenecks to sort out. For example, the proposed matrix representations of SNP systems lead to very sparse matrices, where the majority of values are zero. It is known that sparse matrices can compromise the performance of algorithms since they involve a waste of memory and time. This problem has been extensively studied in the literature of parallel computing. In this paper, we analyze some of these ideas and apply them to represent some variants of SNP systems. We also provide a new simulation algorithm based on a novel compressed representation for sparse matrices. We also conclude which SNP system variant better suits our new compressed matrix representation.

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Analog Implementation of a Spiking System for Performing Arithmetic Logic Operations on Mixed‐Signal Neuromorphic Processors

Ayuso‐Martinez,

Casanueva‐Morato,

Dominguez‐Morales

et al. 2024

Advanced Intelligent Systems

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In recent years, physical limitations in the integration of transistors in computers have forced the search for low‐computational‐power alternatives in hardware design. Although doubts may arise regarding the limit of the relationship between performance and power consumption in computers, these disappear when considering the brain, which is one of the most efficient computing systems. In this way, bioinspired applications try to benefit from the low‐power consumption present in the biological nervous system. Previous work has shown the feasibility of implementing spiking neural networks that operate in a Boolean manner on digital platforms, such as SpiNNaker, using basic logic gates and a spiking memory, which suggests the potential for constructing a low‐power consumption spiking computer. This work takes a first step in the implementation of a spiking central processing unit by developing an arithmetic logic unit, which is an essential block for instruction execution, demonstrating its correct operation on Dynap‐SE1. The results confirm the feasibility of using this Boolean approach on this platform, despite certain limitations in the number of inputs and operating frequencies of the blocks, and pave the way for the construction of a spiking computer.

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An error-tolerant serial binary full-adder via a spiking neural P system using HP/LP basic neurons

Cited by 17 publications

References 9 publications

Snapse: A Visual Tool for Spiking Neural P Systems

Snapse: A Visual Tool for Spiking Neural P Systems

Simulation of Spiking Neural P Systems with Sparse Matrix-Vector Operations

Analog Implementation of a Spiking System for Performing Arithmetic Logic Operations on Mixed‐Signal Neuromorphic Processors

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