Abstract:Multithreading is often seen as a solution to the problem of large memory latencies that occur when remote data is needed for local computation. This paper quantifies the costs and benefits of software multithreading on a distributed memory multiprocessor. We describe the design of a machine-independent software multithreading system as part of a runtime system for a high-level parallel programming language, and present a quantitative analysis of the costs of our multithreading system, as well as its performan… Show more
“…The performance of cache is studied with a multithreaded virtual processor (MVP) [3]. The performance was improved by tolerating memory latency but also lower cache miss rates due to exploitation of data locality.…”
Section: Related Workmentioning
confidence: 99%
“…Given their combination of parallel data processing in a multiprocessor system with the high level of integration of System-on-Chip (SoC), they are great candidates for systems such as network processors and complex multimedia platforms [1]. The important amount of data manipulated by these applications requires a large memory size and a significant number of accesses to the external memory for each processor node in the MPSoC architecture [2,3]. Therefore, it is important to optimize, at the applicationlevel, the access to the memory and it is important to observe the effect of multithreading in order to improve processing time and power consumption.…”
Section: Introductionmentioning
confidence: 99%
“…In these applications, the majority of the area and power cost is due to the global communication and memory interaction [4][5][6]. Indeed, a key area of concentration to handle both real-time and energy/power problems is the memory system [2,3]. The development of new strategies and techniques to decrease memory space, code size and shrink the number of accesses to the memory is necessary.…”
Multiprocessor System-on-Chip is one of the main drivers of the semiconductor industry revolution by enabling the integration of complex functionality on a single chip. The techniques for processor design and application optimizations can be combined together for more efficient design of these systems. Thus, the memory optimization techniques improving the data locality can be combined with multithreading technology, improving the overall processor efficiency. The combination of these techniques is mainly challenged by the adaptation of memory optimization techniques to the high parallelism offered by the multithreading environments. This paper presents an in-depth analysis of the impact of multiprocessor and multithreading environments on memory optimization techniques. A discussion is provided on the different types of parallelization (fine and coarse grain) and their influence on memory optimization technique. Some improvements on existing memory optimization techniques are presented as well some adaptation necessary to use them in this type of environment.
“…The performance of cache is studied with a multithreaded virtual processor (MVP) [3]. The performance was improved by tolerating memory latency but also lower cache miss rates due to exploitation of data locality.…”
Section: Related Workmentioning
confidence: 99%
“…Given their combination of parallel data processing in a multiprocessor system with the high level of integration of System-on-Chip (SoC), they are great candidates for systems such as network processors and complex multimedia platforms [1]. The important amount of data manipulated by these applications requires a large memory size and a significant number of accesses to the external memory for each processor node in the MPSoC architecture [2,3]. Therefore, it is important to optimize, at the applicationlevel, the access to the memory and it is important to observe the effect of multithreading in order to improve processing time and power consumption.…”
Section: Introductionmentioning
confidence: 99%
“…In these applications, the majority of the area and power cost is due to the global communication and memory interaction [4][5][6]. Indeed, a key area of concentration to handle both real-time and energy/power problems is the memory system [2,3]. The development of new strategies and techniques to decrease memory space, code size and shrink the number of accesses to the memory is necessary.…”
Multiprocessor System-on-Chip is one of the main drivers of the semiconductor industry revolution by enabling the integration of complex functionality on a single chip. The techniques for processor design and application optimizations can be combined together for more efficient design of these systems. Thus, the memory optimization techniques improving the data locality can be combined with multithreading technology, improving the overall processor efficiency. The combination of these techniques is mainly challenged by the adaptation of memory optimization techniques to the high parallelism offered by the multithreading environments. This paper presents an in-depth analysis of the impact of multiprocessor and multithreading environments on memory optimization techniques. A discussion is provided on the different types of parallelization (fine and coarse grain) and their influence on memory optimization technique. Some improvements on existing memory optimization techniques are presented as well some adaptation necessary to use them in this type of environment.
“…Multithreading has proven useful for overlapping computation and communication or I/O [7,22], for load balancing [14], and for implementing process abstractions in parallel languages [10,12,25,28,34,45].…”
“…Previous experimental research on multithreading performance shows that multithreading is effective at tolerating memory latencies for some applications [17,33,18,32]. Previous analytical research [2,29,27,14] focuses on The multithreading model shows that 2-4 contexts are sufficient to maximize this technique's potential benefit in the current generation of shared-memory multiprocessors.…”
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