An evaluation of system-level fault tolerance on the Intel hypercube multiprocessor

Banerjee, P.; Rahmeh, J.T.; Stunkel, Craig B.; Nair, Vivek; Roy, Kaushik; Abraham, Jacob A.

doi:10.1109/ftcs.1988.5344

Cited by 33 publications

(4 citation statements)

References 0 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The proof of this theorem is rather lengthy and can be found in [9]. We sketch the proof for a representative case (k = 10) here to illustrate how ADD-LINKS is able to generate Q+ (5,10,1). In this case, the generated Q(5, 10, 1) contains two copies Si and S2 of KM.…”

Section: Theorem 4 Graphs B and D Dejned Inmentioning

confidence: 99%

Design of gracefully degradable hypercube-connected systems

Lee

Hayes

1992

Journal of Parallel and Distributed Computing

View full text Add to dashboard Cite

We address the problem of modifying a hypercube computer by the addition of spare nodes and links to improve its fault tolerance, while maintaining a specified level of performance. The hypercube is modeled by a graph in which nodes represent processors and edges represent communication links. A new graphbased measure of performance degradation is introduced. This characterizes a fault-tolerant hypercube as k-fault-tolerant (L-FT) g-step-degradable (g-SD) if the removal of any k nodes reduces the dimension of the largest fault-free subcube by at most g. We show how to construct k-FT g-SD hypercubes for values of k up to 16 and g = 0, 1, or 2. Many of these designs are shown to be link-or degree-optimal. We also propose a construction method that uses small k-FT g-SD designs as seeds to construct kIT g-SD designs of larger sizes. This results in fault-tolerant hypercubes in which reconilguration can be first done locally and then easily extended to the entire system. The small number of added links and nodes is shown to be useful not only in increasing the fault tolerance of the underlying hypercube, but also in reducing the average internode distance.

show abstract

Section: Theorem 4 Graphs B and D Dejned Inmentioning

confidence: 99%

Design of gracefully degradable hypercube-connected systems

Lee

Hayes

1992

Journal of Parallel and Distributed Computing

View full text Add to dashboard Cite

show abstract

“…Expensive approaches were proposed to improve the fault tolerance of hypercube networks by using spares or by reconfiguration [17,18], such as the use of spare links and nodes [2], augmenting each node with one extra node [9], the use of multiple virtual nodes on each node for workload redistribution under faults [16], or reconfiguring the run-time system [17] in the case of faults. For a fixed number of nodes, the CUST used in [18] requires much less number of edges than a hypercube.…”

Section: Introductionmentioning

confidence: 99%

On the average distance of the hypercube tree

Alsuwaiyel

2010

International Journal of Computer Mathematics

View full text Add to dashboard Cite

Given a graph G on n vertices, the total distance of G is defined as σ G = (1/2) u,v∈V (G) d (u, v), where d(u, v) is the number of edges in a shortest path between u and v. We define the d-dimensional hypercube tree T d and show that it has a minimum total distance σ (T d ) = 2σ (H d ) − n 2 = (dn 2 /2) − n 2 over all spanning trees of H d , where H d is the d-dimensional binary hypercube. It follows that the average distance of T d is μ(T d ) = 2μ(H d ) − 1 = d(1 + 1/(n − 1)) − 1.

show abstract

“…Preparata et al 16 proposed an approach in which processors test each other and the test results are collected and analyzed to determine faulty processors. This approach of mutual testing based system appears to fit well with large scale homogeneous multi-computer systems 2,4,5,6,12,14,17 . The approach is based on the use of an assumption or a priori knowledge on the fault bound, i.e., the upper bound on the possible number of faulty processors that might exist at any given time.…”

Section: Introductionmentioning

confidence: 78%

Testing Strategy in Multiprocessor Systems with Cube Connections

Kavianpour¹

2011 ASEE Annual Conference &Amp; Exposition Proceedings

View full text Add to dashboard Cite

show abstract

An evaluation of system-level fault tolerance on the Intel hypercube multiprocessor

Cited by 33 publications

References 0 publications

Design of gracefully degradable hypercube-connected systems

Design of gracefully degradable hypercube-connected systems

On the average distance of the hypercube tree

Testing Strategy in Multiprocessor Systems with Cube Connections

Contact Info

Product

Resources

About