An evolutionary approach to hardware encryption and Trojan-horse mitigation

Marcelli, Andrea; Restifo, Marco; Sánchez, Ernesto; Squillero, Giovanni

doi:10.23919/date.2017.7927244

Cited by 9 publications

(6 citation statements)

References 12 publications

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“…-Adaptive Iterative Optimization Algorithm (AIOA) [74] is a model-enhancing technique in which a specific classifier is iteratively improved using the input training data weighted by a weight vector to reduce the errors. -Multi-Objective Evolutionary Algorithm (MOEA) [75] is an enhanced optimization algorithm that starts from randomly generated populations and then increasingly approaches the Pareto-optimal solutions by applying multiple-generation continuous optimization operations with adaptability. -Particle Swarm Optimization (PSO) Algorithm [104], [125] is an optimizer that attempts to find the optimal solution through the cooperation and information sharing among individuals in a group.…”

Section: ) Design Optimization and Model Enhancementmentioning

confidence: 99%

“…10. To this end, Andrea et al introduced a MOEA-based obfuscation design strategy that can explicitly reduce the rare signals and maximize the efficiency of logic encryption to effectively mitigate the threats of HT attacks and overproduction [75]. However, such a technique is only suitable for small combinational circuits.…”

Section: -Implantation Preventionmentioning

confidence: 99%

“…On the one hand, ML algorithms can be selected according to the given application scenario. For instance, to minimize the number of rare signals and maximize the performance of logic encryption, an MOEA method has been applied to achieve the best obfuscation with an average 50% Hamming distance and prevent the insertion of HTs [75]. Other application scenarios include feature selection, dimensionality reduction, classification/clustering, and performance enhancement of the learning models.…”

Section: ) Reasonable Selection Of the Learning Modelsmentioning

confidence: 99%

“…For general ML-based HT detection methods, the indicators mentioned above can be exploited to evaluate the effectiveness of the prediction results. For other studies, such as the work in [75], the Hamming distance is applied to evaluate the logic encryption keys because its goal is to reduce the occurrence of rare signals and maximize the efficiency of logic encryption; for secure architecture with unsupervised learning, there are two indicators, e.g., the hardware area and power overhead, utilized to assess the performance [114]. In addition, only a few efforts have assessed the time overhead of the ML-based approaches.…”

Section: ) Performance Evaluation Criteriamentioning

confidence: 99%

“…Hence, exploring high-layer HT countermeasures via ML might also be an interesting future direction. -The studies in [75] and [125] explored using optimization algorithms to enhance the reliability of IC design flows. As a result, such discussions could be used as references to establish a strong IC supply chain or even hardware ecosystem.…”

Section: Future Trends and Directionsmentioning

confidence: 99%

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A Survey on Machine Learning Against Hardware Trojan Attacks: Recent Advances and Challenges

et al. 2020

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The remarkable success of machine learning (ML) in a variety of research domains has inspired academic and industrial communities to explore its potential to address hardware Trojan (HT) attacks. While numerous works have been published over the past decade, few survey papers, to the best of our knowledge, have systematically reviewed the achievements and analyzed the remaining challenges in this area. To fill this gap, this article surveys ML-based approaches against HT attacks available in the literature. In particular, we first provide a classification of all possible HT attacks and then review recent developments from four perspectives, i.e., HT detection, design-for-security (DFS), bus security, and secure architecture. Based on the review, we further discuss the lessons learned in and challenges arising from previous studies. Despite current work focusing more on chip-layer HT problems, it is notable that novel HT threats are constantly emerging and have evolved beyond chips and to the component, device, and even behavior layers, therein compromising the security and trustworthiness of the overall hardware ecosystem. Therefore, we divide the HT threats into four layers and propose a hardware Trojan defense (HTD) reference model from the perspective of the overall hardware ecosystem, therein categorizing the security threats and requirements in each layer to provide a guideline for future research in this direction.

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