2018 IEEE International Symposium on Circuits and Systems (ISCAS) 2018
DOI: 10.1109/iscas.2018.8351151
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An Excitation Time Model for General-purpose Memristance Tuning Circuit

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Cited by 4 publications
(4 citation statements)
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“…A safety gap must be allocated at each end to avoid the uncertainty of R on and R of f due to the process variation. Furthermore, the gap at the low memristance side should be widened to ensures the saturation (where the low memristance causes insufficient voltage for memristor programming) does not occur [50].…”
Section: B Data Range and Decodingmentioning
confidence: 99%
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“…A safety gap must be allocated at each end to avoid the uncertainty of R on and R of f due to the process variation. Furthermore, the gap at the low memristance side should be widened to ensures the saturation (where the low memristance causes insufficient voltage for memristor programming) does not occur [50].…”
Section: B Data Range and Decodingmentioning
confidence: 99%
“…This is because the high memristance due to the low temperature causes insufficient voltage in the connected current mirror. In addition, the low memristance cannot dominate the impedance of the current mirror and results in the current saturation [50]. This needs the further investigation to find the proper solution.…”
Section: A Offsetmentioning
confidence: 99%
“…Indeed, the series resistor is an excellent "excess voltage absorber" as it prevents from overstressing and thus improves device endurance [16]. Some more recent works also studied the VD impact in bidirectional tuning circuits with a FET transistor as resistive element [17]. So, convinced about its utility and ease of use, in the work reported in this brief we build upon the theoretical analysis presented in [13] and demonstrate an experimental verification of the VD approach for accurate SET resistance tuning of memristors.…”
Section: Introductionmentioning
confidence: 99%
“…Indeed, the series resistor is an excellent "excess voltage absorber" as it prevents from overstressing and thus improves device endurance [16]. Some more recent works also studied the VD impact in bidirectional tuning circuits with a FET transistor as resistive element [17]. From bottom (dark blue line) to top (dark red line) we simulate (1) for different RS values between 2kΩ and 20kΩ using VSET=0.45V and Rm ∈ [0.1, 5]kΩ.…”
Section: Introductionmentioning
confidence: 99%