An FPGA-Based LOCO-ANS Implementation for Lossless and Near-Lossless Image Compression Using High-Level Synthesis

Abstract

In this work, we present and evaluate a hardware architecture for the LOCO-ANS (Low Complexity Lossless Compression with Asymmetric Numeral Systems) lossless and near-lossless image compressor, which is based on JPEG-LS standard. The design is implemented in two FPGA generations, evaluating its performance for different codec configurations. The tests show that the design is capable of up to 40.5 MPixels/s and 124 MPixels/s per lane for Zynq 7020 and UltraScale+ FPGAs, respectively. Compared to the single thread LOCO-ANS software implementation running in a 1.2 GHz Raspberry Pi 3B, each hardware lane achieves 6.5 times higher throughput, even when implemented in an older and cost-optimized chip like the Zynq 7020. Results are also presented for a lossless only version, which achieves a lower footprint and approximately 50% higher performance than the version that supports both lossless and near-lossless. Interestingly, these great results were obtained applying High-Level Synthesis, describing the coder with C++ code, which tends to establish a trade-off between design time and quality of results. These results show that the algorithm is very suitable for hardware implementation. Moreover, the implemented system is faster and achieves higher compression than the best previously available near-lossless JPEG-LS hardware implementation.

Low-cost ANS encoder for lossless data compression in FPGAs

“…The use of resources varies between the implementations. The higher use is observed in [11], [13], and [15]. However, as mentioned in Section IV, those values include more functionalities than just compression -they include the part responsible for data pre-processing also, thus, the outcome is as expected.…”

“…Table II shows resources used for the implementation of encoders given in [14], [15]. Resources given for [14] are for the alphabet of size 256, and resources given for [15] are for the implementation of the state's bit-width of 7 bits. Compared to other entropy encoders, it can be seen that ANS encoders generally need much fewer resources.…”

“…Compared to other entropy encoders, it can be seen that ANS encoders generally need much fewer resources. Even the design proposed in [15], where the encoder is only a part of the solution, needs fewer resources than the original Huffman encoder presented in [12]. However, there are many hardware implementations of the Huffman coding, meaning that versions that require fewer resources can exist.…”

“…Table VI contains resources needed for the implementation of encoders described in Section IV as a percentage of resources needed for the implementation of the proposed design. Additionally, what is not given in the table, the design proposed in [12] uses 50 more blocks of RAM, the design given in [14] uses 3 more blocks of RAM, the design from [15] uses 29 more blocks of RAM, and design from [15] uses two more DSP units. The number of RAM blocks is not listed in Table VI, because RAM blocks are not used by the proposed design.…”

A Real-Time Image Row-Compression Method for High-Definition USB Cameras Based on FPGA

“…In order to solve the problem of context writing and reading in JPEG-LS, a co-design method is proposed from both software and hardware aspects [11]. The hardware structure of the LOCO-ANS lossless and near-lossless image compressor based on the JPEG-LS standard is evaluated [12]. Some scholars have proposed a new compression method, which can predict based on linear and non-linear methods.…”